THP4 Search Results

IS281-4

Abstract: ltv-217 THP4 LTV-247 IS281
Contextual Info: IS281-4 FEATURES * Current transfer ratio CTR : MIN. 50% at IF = 5mA, VCE = 5V * Isolation voltage between input and output ( Viso = 3KVrms ) * Compact dual-in-line package 4 channels type * Employs double transfer mold technology * Marked as THP4 * ROHS compliance

IS2801-4

Abstract: ltv-217 LTV217 LTV-247 ltv-227 IS2801-4GB is2801 THP4 LTv24
Contextual Info: IS2801-4 FEATURES * Current transfer ratio CTR : MIN. 50% at IF = 5mA, VCE = 5V * Isolation voltage between input and output ( Viso = 3KVrms ) * Compact dual-in-line package 4 channels type * Employs double transfer mold technology * Marked as THP4 * ROHS compliance

DDR200

Abstract: DDR266A DDR266B IBMN612404GT3B IBMN612804GT3B IBMN62540 IBMN62580 128MB PC266
Contextual Info: IBMN612404GT3B IBMN612804GT3B 128Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 * Values are nominal (exact tCK should be used).

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

Nanya nt5ds8m16fs

Abstract: NT5DS8M16FS NT5DS8M16FT-5TI NT5DS8M16FS-5T DDR333 DDR400 NT5DS8M16 NT5DS8M16FT-6KI NT5DS8M16FT
Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FS-5TI NT5DS8M16FT-6KI NT5DS8M16FS-6KI 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8M16 NT5DS8M16FS
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

NT5DS16M16BF-6K

Abstract: NT5DS32M8BT NT5DS16M16BT-6K NT5DS16M16BT NT5DS64M4BT NT5DS32M
Contextual Info: NT5DS64M4BT NT5DS32M8BT NT5DS16M16BT NT5DS64M4BF NT5DS32M8BF NT5DS16M16BF NT5DS64M4BS NT5DS32M8BS NT5DS16M16BS NT5DS64M4BG NT5DS32M8BG NT5DS16M16BG 256Mb DDR SDRAM Features • Data mask DM for write data • DLL aligns DQ and DQS transitions with CK transitions

DDR200

Abstract: DDR266A DDR266B IBMN62540 IBMN625404GT3B IBMN62580 IBMN625804GT3B
Contextual Info: IBMN625404GT3B IBMN625804GT3B 256Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 2 2.5 * Values are nominal (exact tCK should be used).

TMP47C203N

Contextual Info: TMP47C203N - 1 FCR4.0MC5 T a - 2 0 Cdeg] 7 5 3 I -1 7 5 3 I -I .5 .3 a. V 1 H / V 1 L CV3 b. V 2 H / V 2 L CV3 c. F o s c 0- Typical Wo r s t -1- 1- 1_I_L . IZÌ .1 -.1 -.3 -.5 400 300 200 100 60 55 50 45 40 + 0- J- L

THP4

Contextual Info: THP-core,ferrite magnet cores,bare core,NiZn ferrite magnet core,THP cores,NiCuNi Core, China Professional Ferrite Core Supplier p THP TYPE Threaded Cup Cores (1)ORDERING CODE Material Type Outside Diameter(AΦ) Length(D) Shape Thread Type Thread Pi Applications:IFT and various filer pair to DR Type Core when in using

micron ddr

Abstract: MT46V4M32
Contextual Info: ADVANCE‡ 128Mb: x32 DDR SDRAM DOUBLE DATA RATE DDR SDRAM MT46V4M32 - 1 Meg x 32 x 4 banks For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/dramds FEATURES PIN ASSIGNMENT (TOP VIEW) 100-Pin TQFP (Normal Bend Shown)

MT46V2M32

Contextual Info: 64Mb: x32 DDR SDRAM DOUBLE DATA RATE DDR SDRAM MT46V2M32V1- 512K x 32 x 4 banks MT46V2M32 - 512K x 32 x 4 banks For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/dramds FEATURES PIN ASSIGNMENT (TOP VIEW) 100-Pin TQFP

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

dallas semiconductor IC DS 1242

Abstract: 063a st rcc23 RG703 BUS34 bel 1515 hybrid ic Motorola LSC microcontroller mps 0514 MPS 0713 P/LM 1709 cb
Contextual Info: DS26556 4-Port Cell/Packet Over T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26556 is a quad, software-selectable T1, E1, or J1 transceiver with a cell/packet/TDM interface. It is composed of four framer/formatters + LIUs, and a UTOPIA cell , POS-PHY

Contextual Info: NT5DS128M4BF / NT5DS128M4BT/ NT5DS128M4BG Green / NT5DS128M4BS (Green) NT5DS64M8BF / NT5DS64M8BT/ NT5DS64M8BG (Green) / NT5DS64M8BS (Green) NT5DS32M16BF / NT5DS32M16BT / NT5DS32M16BG (Green) / NT5DS32M16BS (Green) 512Mb DDR SDRAM Features • • • •

Contextual Info: IBMN612404GT3B IBMN612804GT3B 128Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 * Values are nominal (exact tCK should be used).

N2DS25H16BT-5T

Abstract: N2DS25H16BS-5T Elixir N2DS25H16BS N2DS25H16BS-6K
Contextual Info: N2DS25H16BT/N2DS25H16BS Preliminary Edition 256Mb DDR SDRAM Features • • • • • CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operating Frequency MHz DDR400 DDR333 DDR266B (5T) (6K) (-75B) 133 100 166 166 133 200 - • • • • • •

n2ds51280

Contextual Info: N2DS51280CS 512Mb DDR SDRAM C-Die Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2.5, 3 • Auto Precharge option for each burst access

NT5DS8M16FS-5T

Abstract: NT5DS8
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • • • • • CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operation Frequency MHz DDR400 DDR333 DDR266 (5T) (6K) (75B) 133 100 166 166 133 200 - • • • • • • • • • • Double data rate architecture: two data transfers per

NT5DS32M16BG-5T

Abstract: nt5ds32m16bs-6k NT5DS32M16BS NT5DS32M16BS-5T Nanya NT5DS64M8BS-5T
Contextual Info: NT5DS128M4BF / NT5DS128M4BT/ NT5DS128M4BG Green / NT5DS128M4BS (Green) NT5DS64M8BF / NT5DS64M8BT/ NT5DS64M8BG (Green) / NT5DS64M8BS (Green) NT5DS32M16BF / NT5DS32M16BT / NT5DS32M16BG (Green) / NT5DS32M16BS (Green) 512Mb DDR SDRAM Features • • • •

Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FT-6KI 128Mb DDR SDRAM - Preliminary Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8

Contextual Info: NT5DS32M16BS-6KI NT5DS128M4BG-6KI NT5DS32M16BS-5TI NT5DS128M4BG-5TI 512Mb DDR SDRAM Features • • • • • CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operating Frequency MHz DDR400(5TI) DDR333(6KI) 133 166 166 200 - • • • • • •

Contextual Info: NT5DS128M4AF NT5DS64M8AF NT5DS32M16AF 512Mb DDR SDRAM Features • • • • • CAS Latency and Frequency Maximum Operating Frequency MHz * CAS Latency DDR333 DDR266B (-6K)* (-75B) 2 133 100 2.5 166 133 * -6K also meets DDR266A Spec (MHz-CL- tRCD -t RP = 133-2-3-3)

NT5DS16M16BF-6K

Abstract: NT5DS16M16BT NT5DS32M8BT NT5DS64M4BT NT5DS16M16BT-75B
Contextual Info: NT5DS64M4BT NT5DS32M8BT NT5DS16M16BT NT5DS64M4BF NT5DS32M8BF NT5DS16M16BF NT5DS64M4BS NT5DS32M8BS NT5DS16M16BS NT5DS64M4BG NT5DS32M8BG NT5DS16M16BG 256Mb DDR SDRAM Features CAS Latency • • • • • Double data rate architecture: two data transfers per