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    TH58NVG2S3BTG00

    Abstract: th58nvg th58nvg2s3btg TH58NVG2S3 PSL 26 DIN2111 PA15 PA16 th58nvg*t TH58NVG2S3B
    Text: TH58NVG2S3BTG00 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 4 GBIT 512M x 8 BIT CMOS NAND E PROM Lead-Free DESCRIPTION The TH58NVG2S3B is a single 3.3 V 4Gbit (4,429,185,024 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 4096 blocks.


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    PDF TH58NVG2S3BTG00 TH58NVG2S3B 2112-byte 004-08-20A TH58NVG2S3BTG00 th58nvg th58nvg2s3btg TH58NVG2S3 PSL 26 DIN2111 PA15 PA16 th58nvg*t