cem 5161
Abstract: T7229 T7229-PC T-7229
Text: Preliminary T7229 Primary Access Framer Features • Multiple line format capability a AMI and HDB3 CEPT □ Bipolar and B8ZS ■ Remote frame/multiframe alarm activation and detection ■ Multiple DS1 TDM frame formats a Independent formats - D4, SLC Carrier,
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T7229
30-channel
TS-16
cem 5161
T7229-PC
T-7229
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229GB
Abstract: 257AU
Text: 257AU Receive Synchronizer Features • Selectable DS1 1.544 M b/s or CEPT (2.048 M b/s) form ats Single 5 V supply TTL-com patlbie inputs and outputs ■ 4- o r 16-state RSM signal extraction ■ Internal m aintenance circuits Description The 257AU Receive Synchronizer (RS) is part of an LSI digital fa cility interface chip set that also
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257AU
16-state
257AL
T7229
229CG)
229GB
32-pin
5-71cription
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IR receiver TK 19 544
Abstract: IR receiver TK 19 527 229GB T7229 fault codes for RBS sr62
Text: 229GB Primary Access Framer Features • Bipolar and B8ZS line format capability ■ Multiple DS1 TDM frame formats D Independent formats - D4 channel bank D4 , SLC 96 Carrier (SL), extended superframe (ESF), and digital data system T1 digital multiplexer (DDS)
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229GB
IR receiver TK 19 544
IR receiver TK 19 527
T7229
fault codes for RBS
sr62
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72284
Abstract: IR 536
Text: VARIABLE WIDTH CMOS SUPERSYNC FIFO 32,768 x 18 or 65,536 x 9 65,536x18 or 131,072x9 PRELIMINARY IDT72284 T72294 Integrated Device Technology. Inc. FEATURES: Independent Read and W rita clocks permit reading and writing simultaneously} VSSi * Choose among the following memory organizations:
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536x18
072x9
IDT72284
IDT72294
64-oiirthfnC
64-pin
IDT72294
IDT72261/72271,
IDT72255/72265
72284
IR 536
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72284
Abstract: No abstract text available
Text: VARIABLE WIDTH CMOS SUPERSYNC FIFO 3 2,768x18 or 65,536x9 65,536x18 or 131,072x9 PRELIMINARY IDT72284 T72294 Integrated Device Technology, Inc. FEATURES: • Choose among the following memory organizations: IDT72284 32,768 x 18 or 65,536 x 9 T72294
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768x18
536x9
536x18
072x9
IDT72284
IDT72294
IDT72294
IDT72261/72271,
IDT72255/72265
72284
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72284
Abstract: No abstract text available
Text: V A R IA B L E W ID T H S U P E R S Y N C FIF O 3 2 ,7 6 8 x 18 o r 6 5 ,5 3 6 x 9 6 5 ,5 3 6 x 18 o r 13 1 ,0 7 2 x 9 FEATURES: • Choose among the following memory organizations: IDT72284 32,768 x 18 or 65,536 x 9 T72294 65,536 x 18 or 131,072 x 9
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IDT72284
IDT72294
IDT72261/72271,
IDT72255/72265
IDT72264/72274
PN64-1)
PP64-1)
72284
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T7230
Abstract: No abstract text available
Text: Preliminary Data Sheet March 1992 / s AT&T - Microelectronics T7230 Primary Access Framer/Controller PAC Features • Framing formats: — DS1 (1.544 M bits/s): ESF; D4; SZ.C -96; DDS; DDS with FDL access — Programmable independent transm it and receive framing mode when using the ESF
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T7230
16-state
SLC-96;
channel-24
91-225S
89-129S
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Untitled
Abstract: No abstract text available
Text: CMOS SUPERSYNC FIFO 65,536 x 9 131,072x9 PRELIMINARY IDT72281 T72291 Integrated De'v i e Technoi>gy, l i e . FEATURES: • Choose among the following memory organizations: IDT72281 65,536 x 9 T72291 131,072x9 • Pin-compatible with the IDT72261 LA/72271 LA SuperSync FIFOs
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072x9
IDT72281
IDT72291
IDT72291
IDT72261
LA/72271
PN64-1)
PP64-1)
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72284
Abstract: No abstract text available
Text: VARIABLE WIDTH CMOS SUPERSYNC FIFO 32,768 x 18 or 65,536 x 9 65,536 x 18 or 131,072 x 9 FEATURES: • Choose among the following memory organizations: IDT72284 32,768 x 18 or 65,536 x 9 T72294 65,536 x 18 or 131,072 x 9 • Pin-compatible with the IDT72261/72271, IDT72255/72265
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IDT72284
IDT72294
IDT72261/72271,
IDT72255/72265
IDT72264/72274
PN64-1)
PP64-1)
72284
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Untitled
Abstract: No abstract text available
Text: 257AL Transm it Form atter Features • 2-, 4-, 16-state signaling or inhibit signaling ■ Variable F-bit and parity-bit delays ■ Selectable DS1 1.544 Mb/s or CEPT (2.048 Mb/s) formats ■ TTL-compatible Description The 257AL Transmit Formatter integrated circuit converts 14 bits of parallel data (8 traffic bits, 5
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257AL
16-state
32-pin
RS42898
J32562
DS88-48SMOS
I19HE
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229FB
Abstract: 229GB T7229 GPL11 GPL01
Text: 229FB Maintenance Buffer Features • 8 -bit interface bus ■ M icroprocessor access to co n tro l/re p o rt streams ■ Ten general-purpose latched outputs ■ Preprocessing counters on fa cility error conditions updated by the framer ■ Built-in operational testing capability
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229FB
T7229
229CG)
229GB
257AU
257AL
T7229
GPL11
GPL01
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GSIG
Abstract: T7229 E12E13 257al 229GB
Text: 257AL Transmit Form atter Features • 2-, 4-, 16-state signaling or inhibit signaling Variable F-bit and parity-bit delays ■ Selectable DS1 1.544 Mb/s or CEPT (2.048 Mb/s) formats TTL-compatible Description The 257AL Transmit Formatter integrated circuit converts 14 bits of parallel data (8 traffic bits, 5
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257AL
16-state
32-pln
GSIG
T7229
E12E13
229GB
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