T15N Search Results

T15N1024A

Abstract: T15N1024A-100C T15N1024A-100CI T15N1024A-100P T15N1024A-100PI T15N1024A-55D T15N1024A-55DI T15N1024A-70H T15N1024A-70HI
Contextual Info: tm TE CH T15N1024A SRAM 128K X 8 LOW POWER CMOS STATIC RAM FEATURES GENERAL DESCRIPTION • Low-power consumption - Active: 40mA at 55ns Max. - CMOS Stand-by: 10uA (Max.) • 55/70/100 ns access time The T15N1024A is a very Low Power CMOS Static RAM organized as 131,072 words by 8 bits.

44-PIN

Abstract: 48-PIN T15N1M16A T15N1M16A-70C T15N1M16A-70CI T15N1M16A-70J T15N1M16A-70JI T15N1M16A-70S T15N1M16A-70SI
Contextual Info: tm TE CH Preliminary T15N1M16A SRAM 64K X 16 LOW POWER CMOS STATIC RAM FEATURES GENERAL DESCRIPTION The T15N1M16A is a low power CMOS Static • Fast access time : 55/70/100 ns RAM organized as 65,536 words by 16 bits. That • Single +2.4 to 3.6V Power Supply

44-PIN

Abstract: 48-PIN T15N1M16A T15N1M16A-70C T15N1M16A-70CI T15N1M16A-70J T15N1M16A-70JI T15N1M16A-70S T15N1M16A-70SI
Contextual Info: tm TE CH T15N1M16A SRAM 64K X 16 LOW POWER CMOS STATIC RAM FEATURES GENERAL DESCRIPTION The T15N1M16A is a low power CMOS Static • Fast access time : 55/70/100 ns RAM organized as 65,536 words by 16 bits. That • Single +2.4 to 3.6V Power Supply operates on a wide voltage range from +2.4 to 3.6V

T15N1024A

Abstract: T15N1024A-100C T15N1024A-100P T15N1024A-100PI T15N1024A-55D T15N1024A-55DI T15N1024A-70H T15N1024A-70HI
Contextual Info: tm TE CH T15N1024A SRAM 128K X 8 LOW POWER CMOS STATIC RAM FEATURES GENERAL DESCRIPTION • Low-power consumption - Active: 40mA at 55ns Max. - CMOS Stand-by: 10uA (Max.) • 55/70/100 ns access time The T15N1024A is a very Low Power CMOS Static RAM organized as 131,072 words by 8 bits.

T15N1024A

Abstract: T15N1024A-100C T15N1024A-100CI T15N1024A-100P T15N1024A-100PI T15N1024A-55D T15N1024A-55DI T15N1024A-70H T15N1024A-70HI HD 0802 b
Contextual Info: tm TE CH T15N1024A 128K X 8 LOW POWER CMOS STATIC RAM SRAM FEATURES GENERAL DESCRIPTION • Low-power consumption - Active: 40mA at 55ns - Stand-by: 5uA CMOS input/output • 55/70/100 ns access time The T15N1024A is a very Low Power CMOS Static RAM organized as 131,072 words by 8 bits.

Contextual Info: NL Series — SMD Ferrite Wound Inductor These revolutionary, highly reliable wound chip inductors for automatic mounting, have been developed in response to the trend toward high density in electronic equipment. With metal terminals and a body of heat resistant resin, these

T08N

Abstract: UT01N t03n n21p UT03N n25p n20p AD8151 T09N N31P
Contextual Info: PRELIMINARY TECHNICAL DATA TM 33 x 17, 3.2Gb/s Digital Crosspoint Switch a s tre a m D 7 A 5 F irst Ran k 1 7 x 7 b it L a tc h Se co n d Ra n k 1 7 x 7 b it L a tc h Input Decoders RE INN CS Output Address Decoder FEATURES Low Cost 33 x 17, Fully Differential, Nonblocking Array

CS16LV40963

Abstract: BS62LV4006 sram cross reference CS18LV40963 LY6264 Hynix Cross Reference cs18lv10245 cs18lv02560 LY621024 K6X1008C2D
Contextual Info: www.ashlea.co.uk 01793 783784 Low power SRAM Cross Reference Density Configuration 64K 8Kx8 256K 32Kx8 Lyontek LY6264 LY62L64 LY62256 LY62L256 LY62256 2.7-5.5 1M 128Kx8 64Kx16 LY621024 LY62L1024 LY62L6416 Samsung K6X0808C1D K6X0808T1D K6X1008C2D K6X1008T2D

Contextual Info: 256M GDDR3 SDRAM K4J55323QG 256Mbit GDDR3 SDRAM Revision 1.2 March 2006 Notice INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

timing controller SHART

Abstract: T21N K4U52324Q SAMSUNG GDDR4 K4U52324QE-BC09 GDDR4
Contextual Info: 512M GDDR4 SGRAM K4U52324QE 512Mbit GDDR4 SGRAM 2M x 32Bit x 8 Banks Graphic Double Data Rate 4 Synchronous DRAM with Uni-directional Data Strobe and DLL 136Ball FBGA Revision 1.0 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

WL 系列

Contextual Info: TOKEN TRWL 貼片開放式繞線超薄高電流電感 貼片繞線電感 超薄高電流電感 產品簡介 德鍵電子生產的繞線貼片電感 - 採用高 共振頻率的陶瓷體線繞結構，超小體積 電感，可提供較高的 Q 值超薄型，

T103 0830

Abstract: t1n6 WL02 T WL05 WL05-T3N0 T22N 900 T3N6 WL02 Woofer 801 WL06
Contextual Info: Wire Wound Chip Inductor－WL Series Feature －Wire wound Ceramic Construction Provide High SRFs －Ultra-compact Inductors Provide Exceptional Q Values －Low profile , High Current are Available －Miniature SMD Chip Inductor for Fully Automated Assembly

Contextual Info: 22 ChipInductors-1008HTSeries 2520 T h e s e lo w p ro file in d u c to rs a re 4 0 % th in n e r th a n o u r c o n v e n tio n a l 1 0 0 8 b o d y s iz e s . T h e y fe a tu re s ta n d a rd in d u c ta n c e to le ra n c e s o f 5 -1 0 % , h ig h S R F s a n d v e ry h ig h Q.

SQFP-48

Abstract: T6N 700 UCC5638
Contextual Info: SiP5638 New Product Vishay Siliconix 15-Line SCSI Bus Terminators D Pin Compatible with UCC5638 D Lead Pb -Free SQFP-48 Package FEATURES D Auto Selection of S/E or LVD SCSI Termination D 2.7-V to 5.25-V TERMPWR Range D Meets SCSI-1, SCSI-2, SPI-2 (ULTRA-2), SPI-3

T-15N

Abstract: T15N/200T
Contextual Info: D o c u m e n t 1 69-1 Chip Inductors- 1008HT Series 2520 These low profile inductors are 40% thinner than our conventional 1008 body sizes. They feature standard inductance tolerances of 5-10%, high SRFs and very high Q. Inductance2 (nH) Percent Tolerance3

136ball

Contextual Info: 256M GDDR3 SDRAM K4J55323QG-BC 256Mbit GDDR3 SDRAM Revision 1.0 June 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

T6N 700

Abstract: SQFP-48 UCC5638
Contextual Info: SiP5638 Vishay Siliconix 15-Line SCSI Bus Terminators DESCRIPTION FEATURES The SiP5638 provides active bus termination suitable for all SCSI bus operational modes from SCSI-1 through SPI-4 Ultra 320 . The termination includes impedance matching of the SCSI bus to minimize signal reflections from the end of

t1n6

Abstract: T1N2 T3N6 AL02BT1N0 AL02BT1N6 AL02BT3N9 T2N2 400 500MHZ transceiver AL02BT5N6 AL03BT3N3
Contextual Info: Viking THIN FILM CHIP INDUCTOR－AL Viking’s 0603 and 0402 series inductor is a photo lithographically etched single layer ceramic chip. Viking design provides high SRF, excellent Q, and superior temperature stability. This highly stable inductor family is specification designed for critical tolerance

SiP5678

Abstract: SQFP-48 UCC5638 T15N
Contextual Info: SiP5678 New Product Vishay Siliconix 15-Line SCSI Bus Terminators D Pin Compatible with UCC5638 D Lead Pb -Free SQFP-48 Package FEATURES D Auto Selection of S/E or LVD SCSI Termination D 2.7-V to 5.25-V TERMPWR Range D Meets SCSI-1, SCSI-2, SPI-2 (ULTRA-2), SPI-3

CD40108BM

Contextual Info: S CD40108BMS CMOS 4 x 4 Multiport Register December 1992 Features Description • High Voltage Type 20V Rating The CD40108BMS is a 4 x 4 m ultiport register containing four 4-bit registers, w rite address decoder, two separate read address decoders, and two 3-state output buses.

Contextual Info: DEVICE SPECIFICATION 16 x 16 1.5 GBIT/S DIFFERENTIAL CROSSPOINT SWITCH S2016 GENERAL DESCRIPTION FEATURES • 1 6 x 1 6 differential crosspoint switch • Full broadcast switching capability • Differential 10K PECL data path • Up to 1.5 Gbit/s NRZ data rate

SiP5678

Abstract: SQFP-48 UCC5638
Contextual Info: SiP5678 New Product Vishay Siliconix 15-Line SCSI Bus Terminators D Pin Compatible with UCC5638 D Lead Pb -Free SQFP-48 Package FEATURES D Auto Selection of S/E or LVD SCSI Termination D 2.7-V to 5.25-V TERMPWR Range D Meets SCSI-1, SCSI-2, SPI-2 (ULTRA-2), SPI-3

SQFP-48

Abstract: UCC5638 T5N 400
Contextual Info: SiP5638 New Product Vishay Siliconix 15-Line SCSI Bus Terminators D Pin Compatible with UCC5638 D Lead Pb -Free SQFP-48 Package FEATURES D Auto Selection of S/E or LVD SCSI Termination D 2.7-V to 5.25-V TERMPWR Range D Meets SCSI-1, SCSI-2, SPI-2 (ULTRA-2), SPI-3

SiP5678

Abstract: SQFP-48 UCC5638 S0914 73100
Contextual Info: SiP5678 Vishay Siliconix 15-Line SCSI Bus Terminators DESCRIPTION FEATURES The SiP5678 provides active bus termination suitable for all SCSI bus operational modes from SCSI-1 through SPI-4 ultra SCSI 320 . The termination includes impedance matching of the Ultra SCSI bus to minimize signal reflections