SY100S341FC Search Results

SY100S341FC Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
SY100S341FC		Micrel Semiconductor	8-BIT SHIFT REGISTER		Original	PDF
SY100S341FC		Microchip Technology	Integrated Circuits (ICs) - Logic - Shift Registers - IC D-TYPE POS TRG SNGL 24CERPACK		Original	PDF
SY100S341FC		Synergy Semiconductor	8-BIT SHIFT REGISTER		Scan	PDF
SY100S341FC		Synergy Semiconductor	8-BIT SHIFT REGISTER		Scan	PDF
SY100S341FCTR		Micrel Semiconductor	8-BIT SHIFT REGISTER		Original	PDF

SY100S341FC Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
F100K Abstract: SY100S341 SY100S341FC SY100S341JC SY100S341JCTR Text: 8-BIT SHIFT REGISTER FEATURES D7 Q7 Q6 PIN CONFIGURATIONS P6 P7 VEES 11 10 9 8 7 6 5 P4 CP VEE VEES S0 PIN NAMES Parallel Inputs Q0 — Q7 Data Outputs P2 P1 VEE Substrate P0 D0 Q0 VCCO for ECL Outputs Q1 1 24 23 22 21 20 19 18 P5 2 3 17 16 P6 P7 15 14 D7	Original	PDF	F24-1 J28-1 SY100S341JC SY100S341JCTR SY100S341 F24-1) J28-1) F100K SY100S341 SY100S341FC SY100S341JC SY100S341JCTR
F100K Abstract: SY100S341 SY100S341FC SY100S341JC SY100S341JCTR CP-413 Text: 8-BIT SHIFT REGISTER FEATURES D7 Q7 Q6 PIN CONFIGURATIONS P6 P7 VEES 11 10 9 8 7 6 5 P4 CP VEE VEES S0 PIN NAMES Parallel Inputs Q0 — Q7 Data Outputs P2 P1 VEE Substrate P0 D0 Q0 VCCO for ECL Outputs Q1 1 24 23 22 21 20 19 18 P5 2 3 17 16 P6 P7 15 14 D7	Original	PDF	F24-1 J28-1 D0F24-1 SY100S341JC SY100S341JCTR SY100S341 F24-1) F100K SY100S341 SY100S341FC SY100S341JC SY100S341JCTR CP-413
F100K Abstract: SY100S341 SY100S341FC SY100S341JC 032206 Text: 8-BIT SHIFT REGISTER Micrel, Inc. FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S341 SY100S341 DESCRIPTION The SY100S341 offer eight D-type, edge-triggered flipflops with both individual inputs for parallel operation as well as serial inputs for bidirectional shifting, and are	Original	PDF	SY100S341 SY100S341 600MHz 1200ps 150mA M9999-032206 F100K SY100S341FC SY100S341JC 032206
Untitled Abstract: No abstract text available Text: * SYNERGY SEMICONDUCTOR 8-BIT SHIFT REGISTER DESCRIPTION FEATURES The SY100S341 offer eight D-type, edge-triggered flipflops w ith both individual inputs for parallel operation as well as serial inputs for bidirectional shifting, and are designed for use in high-perform ance ECL system s. Data	OCR Scan	PDF	SY100S341 75Ki2 600MHz 1200ps SY100S341 -150m
Untitled Abstract: No abstract text available Text: =1001381 * 0002213 3Û0 SYNERGY 8- b it s h i f t r e g i s t e r sy-ioos34i S E M IC O N D U C T O R FEATURES • ■ Max. shift frequency of 600MHz ■ Max. Clock to Q delay of 1200ps ■ Iee min. o f-150m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels	OCR Scan	PDF	sy-ioos34i 600MHz 1200ps f-150m SY100S341 TD013A1 000221b SY100S341 D24-1
Untitled Abstract: No abstract text available Text: * SY100S341 8-BIT SHIFT REGISTER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES Max. shift frequency of 600MHz Max. Clock to Q delay of 1200ps Iee min. of -150m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V Voltage and temperature compensation for	OCR Scan	PDF	SY100S341 600MHz 1200ps SY100S341 -150m
C28H Abstract: No abstract text available Text: * SYNERGY a R I T K H i F T R F f-, i S ! F- I- S E M IC O N D U C T O R FEATURES r • Max. shift frequency of 600MHz ■ Max. Clock to Q delay of 1200ps ■ I e e min. of -150mA ■ Industry standard 100K ECL levels ■ Extended supply voltage option: Vee = -4.2V to -5.5V	OCR Scan	PDF	600MHz 1200ps -150mA F100K SY100S341 SY100S341 SY100S341DC SY100S341FC SY100S341JC SY100S341JCTR C28H
Untitled Abstract: No abstract text available Text: * SYNERGY 8-BIT SHIFT REGISTER SY100S341 SEMICONDUCTOR DESCRIPTION FEATURES Max. shift frequency of 600MHz Max. Clock to Q delay of 1200ps Iee min. of -150m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V Voltage and temperature compensation for	OCR Scan	PDF	SY100S341 600MHz 1200ps -150m SY100S341
Untitled Abstract: No abstract text available Text: * 8-BIT SHIFT REGISTER SYNERGY SY100S341 SEMICONDUCTOR FEATURES DESCRIPTION • Max. shift frequency of 600MHz ■ Max. Clock to Q delay of 1200ps The SY100S341 offer eight D-type, edge-triggered flipflops with both individual inputs for parallel operation as well	OCR Scan	PDF	SY100S341 600MHz 1200ps SY100S341 -150mA TDD13fil SY100S341DC D24-1 SY100S341FC
F100K Abstract: SY100S341 Text: T0013fll « 0002213 3Û0 8-BIT SHIFT REGISTER SYNERGY SY100S341 S E M IC O N D U C T O R FEATURES • ■ Max. shift frequency of 600MHz ■ Max. Clock to Q delay of 1200ps ■ Iee min. of -150m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels	OCR Scan	PDF	T0013fll SY100S341 600MHz 1200ps -150mA F100K SY100S341 D24-1 F100K