Untitled
Abstract: No abstract text available
Text: TOSHIBA GT2QG102 SM TO SH IBA INSULATED GATE BIPO LA R TRANSISTOR SILICON N-CHANNEL IGBT GT20G102(S M) STROBE FLASH APPLICATIONS U nit in mm • High Input Impedance « Low Saturation Voltage : V q e (sa t) = 8V (Max.) (l£ = 130A) • Enhancement-Mode •
|
OCR Scan
|
GT2QG102
GT20G102
2-10S2C
|
PDF
|
LM311 application notes
Abstract: LM311 LM3111 LM311 OPERATIONAL AMPLIFIER OPERATION lm311 application note LM311 application SLCS007A LM311DBLE 100 khz crystal
Text: LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES SLCS007A- SEPTEMBER 1973 - REVISED FEBRUARY 1992 Fast Response Times LM111 . . . J PACKAGE TOP VIEW Strobe Capability Maximum Input Bias C u rren t. . . 300 nA NC[ 1 EMIT O U T [ 2 Maximum Input Offset C u rren t. . . 70 nA
|
OCR Scan
|
LM111,
LM211,
LM311,
LM311Y
SLCS007A-
LM311
LM111
LM311 application notes
LM311
LM3111
LM311 OPERATIONAL AMPLIFIER OPERATION
lm311 application note
LM311 application
SLCS007A
LM311DBLE
100 khz crystal
|
PDF
|
LM311
Abstract: ic lm311 circuit diagram LM311 application notes SLCS007A LM311DBLE LM311T LM111 fk package
Text: LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES SLCS007A-SEPTEMBER 1 9 7 3 - REVISED FEBRUARY 1992 LM111 . . . J PACKAGE Fast Response Times TOP VIEW Strobe Capability Maximum Input Bias C u rre n t. . . 300 nA NC[ EMIT O U T [ IN + [ IN -[
|
OCR Scan
|
LM111,
LM211,
LM311,
LM311Y
SLCS007A-SEPTEMBER
LM311
LM111
LM311
ic lm311 circuit diagram
LM311 application notes
SLCS007A
LM311DBLE
LM311T
LM111 fk package
|
PDF
|
4502BP
Abstract: TC4502BP 4502B
Text: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4502BP TC4502BP STROBED HEX INVERTER/BUFFER The T C 4 5 0 2 B P is a strobed h e x i n v erter/buffer w ith 3-state output. W h e n D I S A B L E input is set to "H" level, six o u t p u ts b e come high impedance independently
|
OCR Scan
|
TC4502BP
4502BP
TC4502BP
4502B
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TOSHIBA GT20G102 TOSHIBA INSULATED GATE BIPO LAR TRANSISTOR SILICON N -CH ANNEL IGBT G T 2 0 G 1 02 U nit in mm STROBE FLASH APPLICATIONS • • • • High Input Impedance Low Saturation Voltage : V c E say = 8V (Max. (Ic = 130A) Enhancement-M ode 12V Gate Drive
|
OCR Scan
|
GT20G102
|
PDF
|
sn7423
Abstract: transistor 1yc
Text: SN5423, SN5425, SN7423, SN7425 DUAL 4 INPUT NOR GATES WITH STROBE DECEMBER 1983-REVISED MARCH 1988 SN5423 . Package Options Include Plastic and Ceram ic D IP s and Ceram ic Flat Packages . J OR W P AC K A G E S N 7423. N P AC KA G E TOP V IE W ! Dependable T exas Instrum ents Quality and
|
OCR Scan
|
SN5423,
SN5425,
SN7423,
SN7425
1983-REVISED
SN5423
sn7423
transistor 1yc
|
PDF
|
a9011
Abstract: A9012 11ga9 ga9011
Text: T R DATA / 0 U I N T S E M I C O N D U C T O R , I N C C 0 M M U N ! C A 1 ¡0 N S G A 9 0 1 1/G A 9 0 1 2 STROBE STROBE COAXIAL CABLE OR HOST 40 BITS DATA IN HOT ROD TX GA9011 FIBER-OPTIC CABLE USER OR LED PHOTO DETECTOR DESTI NATION HOT ROD RX GA9012 —N
|
OCR Scan
|
GA9011
GA9012
40-bit-wide
GA9011/GA9012
A9011/GA9012
68-Pin
9011-Hot
9012-Hot
a9011
A9012
11ga9
|
PDF
|
TC4056BP
Abstract: tc4056
Text: TC4055BP, TC4056BP/BF C 2MOS DIGITAL IN T E G R A T E D CIR C U IT SIL IC O N M O N O L IT H IC TC4055BP LIQUID-CRYSTAL DISPLAY DRIVER BCD TO 7-Segment Decoder/Driver with "Display-Frequency" Output TC4056BP/TC4056BF LIQUID-CRYSTAL DISPLAY DRIVER (BCD TO 7-Segment Decoder/Driver with Strobed-Latch Function)
|
OCR Scan
|
TC4055BP,
TC4056BP/BF
TC4055BP
TC4056BP/TC4056BF
TC4056BP/BF
TC4056BP
tc4056
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GT25G102 SM TOSHIBA TO SH IBA INSULATED GATE BIPO LA R TRANSISTOR G T 2 5 G 1 2 SILICON N-CHANNEL IGBT ( S M ) U n it in mm STROBE FLASH APPLICATIO NS • High Input Impedance • • • Low Saturation Voltage : v CE(sat) = 8V (Max.) (Ic = 150A) Enhancem ent-Mode
|
OCR Scan
|
GT25G102
2-10S2C
GT25G1Q2
|
PDF
|
5G103
Abstract: No abstract text available
Text: TOSHIBA TENTATIVE GT5G103 TOSHIBA INSULATED GATE BIPOLAR TRANSISTOR SILICON N CHANNEL MOS TYPE G T 5 G 103 U nit in mm STROBE FLASH APPLICATIONS • • • • • 3rd Generation H igh Input Impedance Low Saturation Voltage ; V cE sat =8 V (M ax-) dC = 130A)
|
OCR Scan
|
GT5G103
5G103
|
PDF
|
TC4508BP
Abstract: No abstract text available
Text: TC4508BP TC4508BP C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC DUAL 4-BIT LATCH TC4508BP contains two independent circuits of latches having output disable function and clear function. When STROBE input is "H", the data input appears at the output as it is and if STROBE input is changed
|
OCR Scan
|
TC4508BP
TC4508BP
|
PDF
|
gate driver LM311
Abstract: LM311 ti SLCS007A LM311DBLE LM311PS 2n2222 temperature vs mV NATIONAL SEMICONDUCTOR LM311D
Text: LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES SLCS007A – SEPTEMBER 1973 – REVISED FEBRUARY 1992 D D D D D D Fast Response Times Strobe Capability Maximum Input Bias Current . . . 300 nA Maximum Input Offset Current . . . 70 nA Can Operate From Single 5-V Supply
|
Original
|
LM111,
LM211,
LM311,
LM311Y
SLCS007A
LM311
LM111
gate driver LM311
LM311 ti
SLCS007A
LM311DBLE
LM311PS
2n2222 temperature vs mV
NATIONAL SEMICONDUCTOR LM311D
|
PDF
|
fr1t
Abstract: No abstract text available
Text: TFR1N,TFR1T TOSHIBA Fast Recovery Diode Silicon Diffused Type TFR1N,TFR1T Strobe Applications Fast Recovery Unit: mm • Average forward current: IF (AV) = 0.5 A • Repetitive peak reverse voltage: VRRM = 1000, 1500 V • Reverse recovery time: trr = 10 µs
|
Original
|
DO-41
fr1t
|
PDF
|
2SD826
Abstract: 2SD82
Text: Inchange Semiconductor Product Specification 2SD826 Silicon NPN Power Transistors ・ DESCRIPTION ・With TO-126 package ・Low collector saturation voltage ・High DC current gain ・Large current capacity APPLICATIONS ・For 3V, 6V strobe applications PINNING
|
Original
|
2SD826
O-126
2SD826
2SD82
|
PDF
|
|
|
IW4042BD
Abstract: IW4042BN
Text: TECHNICAL DATA IW4042B Quad Clocked «D» Latch High-Voltage Silicon-Gate CMOS IW4042B types contain four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all
|
Original
|
IW4042B
IW4042B
012AC)
IW4042BD
IW4042BN
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DS90CR287,DS90CR288A DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz Literature Number: SNLS056F DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz General Description Features The DS90CR287 transmitter converts 28 bits of LVCMOS/
|
Original
|
DS90CR287
DS90CR288A
DS90CR287/DS90CR288A
28-Bit
Link-85
SNLS056F
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LP211, LP311 LOWĆPOWER DIFFERENTIAL COMPARATORS WITH STROBES SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003 D Low Power Drain . . . 900 µW Typical With D D D D D D D D D LP211 . . . D PACKAGE LP311 . . . D, P, OR PS PACKAGE TOP VIEW 5-V Supply Operates From ±15 V or From a Single
|
Original
|
LP211,
LP311
SLCS003D
LM211,
LM311
LP311
LP211
|
PDF
|
GDDR
Abstract: K4D553238E-JC33 k4d553238e-jc40
Text: 256M GDDR SDRAM K4D553238E-JC 256Mbit GDDR SDRAM 2M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.3 August 2003 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
K4D553238E-JC
256Mbit
32Bit
144-Ball
K4D553238E-JC33/36
15tCK
14tCK
10tCK
GDDR
K4D553238E-JC33
k4d553238e-jc40
|
PDF
|
CD4514BMS
Abstract: CD4515BMS MC14514 MC14515 inventer
Text: CD4514BMS CD4515BMS CMOS 4-Bit Latch/4-to-16 Line Decoders July 14, 2006 Features Pinout • High-Voltage Types 20-Volt Rating CD4514BMS, CD4515BMS TOP VIEW • CD4514BMS Output “High” on Select • CD4515BMS Output “Low” on Select 24 VDD STROBE 1
|
Original
|
CD4514BMS
CD4515BMS
Latch/4-to-16
20-Volt
CD4514BMS,
CD4514BMS
CD4515BMS
100nA
MC14514
MC14515
inventer
|
PDF
|
NT5TU32M16CG-BD
Abstract: NT5TU32M16CG-be NT5TU64M8CE
Text: NT5TU128M4CE / NT5TU64M8CE /NT5TU32M16CG 512Mb DDR2 SDRAM C-Die Features • 1.8V ± 0.1V Power Supply Voltage • Data-Strobes: Bidirectional, Differential • Programmable CAS Latency: 3,4,5,6 and 7 • 4 internal memory banks • Programmable Additive Latency: 0, 1, 2, 3, and 4
|
Original
|
NT5TU128M4CE
NT5TU64M8CE
/NT5TU32M16CG
512Mb
NT5TU32M16CG-BD
NT5TU32M16CG-be
|
PDF
|
SG615PHC
Abstract: Quarzoszillator MAC4216 SG-615PHC MMI4832 MAZET MMI4832 MAC4124 MAZET SG615PH 100NF
Text: Applikationshinweise zu den Zähler-/Interface IC‘s MMI4832, MAC4124, MAC4216 Version 1.0 Application Note 01 .2 MMI4832: Nutzung der Strobe-Register im inkrementellen Mode .2
|
Original
|
MMI4832,
MAC4124,
MAC4216
MMI4832:
MAC4216:
SG615PHC
Quarzoszillator
MAC4216
SG-615PHC
MMI4832
MAZET MMI4832
MAC4124
MAZET
SG615PH
100NF
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SPEED/PACKAGE AVAILABILITY PIN CONFIGURATION F.N.Q P A C K A G E DATA 3 »cc "’ E «C •E *E =E !E •E -°E 3 .3. ID'” 3, DATA 3« 3» 3 ,. 3,« 3 a" 3, " 3 c_ ST R O B E [7 OUTPUT D Ì» GË d selec t GND []£ TRUTH TABLE INPUTS OUTPUT D c B A STROBE
|
OCR Scan
|
400fl
|
PDF
|
256mb ddr333 200 pin
Abstract: DDR266 DDR266A DDR266B DDR333 K4H560438D-GC K4H561638D
Text: 256Mb DDR SDRAM Key Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe DQS • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition
|
Original
|
256Mb
8K/64ms
256mb ddr333 200 pin
DDR266
DDR266A
DDR266B
DDR333
K4H560438D-GC
K4H561638D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 2SC3072 TOSHIBA Transistor Silicon NPN Epitaxial Type PCT process 2SC3072 Strobe Flash Applications Medium Power Amplifier Applications • Unit: mm High DC current gain : hFE = 140 to 450 (VCE = 2 V, IC = 0.5 A) : hFE = 70 (min) (VCE = 2 V, IC = 4 A) •
|
Original
|
2SC3072
|
PDF
|
