SPI CONVERT Search Results

Contextual Info: 1-1-3 DC/DC Converter ICs SPI-8001TW/SPI-8002TW/SPI-8003TW 2-Output, Step-down Switching Mode •Features ■Absolute Maximum Ratings*1 • 2 regulators combined in one package Ratings Input Voltage • High efficiency: TYP80% SPI-8001TW , TYP78% (SPI-8002TW)

Contextual Info: 1-1-3 DC/DC Converter ICs SPI-8001TW/SPI-8002TW/SPI-8003TW 2-Output, Step-down Switching Mode •Features ■Absolute Maximum Ratings*1 • 2 regulators combined in one package Ratings Input Voltage • High efficiency: TYP80% SPI-8001TW , TYP78% (SPI-8002TW)

Contextual Info: RS232 & USB to SPI RS232/USB-SPI-N Bi-Directional Converter: RS232<->SPI or USB<->SPI The Big Deal • Allows Bi-Directional communication between USB or RS232 to SPI • Easy-to-use, quick-loading GUI and API objects for programmers - compatible with 32/64 Bit operating systems

Contextual Info: RS232 & USB to SPI RS232/USB-SPI Bi-Directional Converter: RS232<->SPI or USB<->SPI The Big Deal • Allows Bi-Directional communication between USB or RS232 to SPI • Easy-to-use, quick-loading GUI and API objects for programmers - compatible with 32/64 Bit operating systems

0123F POWER SUPPLY

Abstract: 0880E 0830B mcu 08300 0080D 0847f fcbg AA23 AC25 IDT7172604
Contextual Info: IDT88K8483 SPI-4 Exchange Document Issue 1.0 Description Features Functionality – Multiplexes logical ports LPs from SPI-4A and SPI-4B to SPI4M – Optionally converts between interleaved packet transfers and whole packet transfers per logical port – Data redirection per LP between SPI-4A, SPI-4B and 10G

RS-232 to SPI converter MAX232

Abstract: RS-232 to spi converter simple switch block diagram spi to RS-232 converter SPI to RS232 MAX232 MAX232 SPI MAX232 pin diagram max232 diagram max232 block diagram
Contextual Info: SIMPLE CIRCUIT RS-232 to SPI 3-wire Converter Author: FIGURE 1: Jerry Farmer Myriad Development Co. Lakewood, CO Myriad_Dev@compuserve.com RS-232 Serial Input/ Output) SIMPLE BLOCK DIAGRAM Clock SPI +5V PICmicro Data SPI Enable SPI INTRODUCTION Switch

AVR151

Abstract: AVR910 ICE200 STK500
Contextual Info: AVR151: Setup And Use of The SPI Features • • • • • • • SPI Pin Functionality Multi Slave Systems SPI Timing SPI Transmission Conflicts Emulating the SPI Code examples for Polled operation Code examples for Interrupt Controlled operation 8-bit RISC

SC18IM700

Abstract: RS-232 to i2c converter sc18is602ipw I2C master controller uart i2c to RS-232 converter LCD 16PIN 4 SC18IS600 SC18IS600IPW SC18IS601 SC18IS602
Contextual Info: NXP I2C/SPI master bridges SC18IS600/601, SC18IS602/603, and SC18IM700 Connect I2C/SPI slave or UART to I2C/SPI master or GPIO These compact protocol converters create seamless, low-power, low-voltage interface connections, so they make it quick and easy to add I2C/SPI master and GPIO capability to

Contextual Info: Active Errata List • • • • During UART Reception, Clearing REN May Generate Unexpected IT SPI Interface - Transmission on Master Mode SPI Interface - SPI SS pin Limitation on Master/Slave SPI - SPI Slave Responding in a Multislave Configuration When Not Selected by the

M95512 diagram

Abstract: M95512-DR M95512-W M95512 M95512-R
Contextual Info: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit

Contextual Info: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit

M95512

Abstract: M95512-DR M95512-R M95512-W
Contextual Info: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit

EEPROM ST M95256

Abstract: M95256-DR
Contextual Info: M95256-DR M95256 M95256-W M95256-R 256 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface positive clock SPI modes : – M95256, M95256-W and M95256-R: standard SPI 256 Kbit EEPROM – M95256-DR: standard SPI 256 Kbit

SC1887

Abstract: SC-1887 AT1154 scintera SC Connector SPI USB
Contextual Info: SC-USB_SPI Datasheet Rev1; March 2010 SC-USB-SPI: USB to SPI Interface Adapter General Description_ SC-USB-SPI is an adapter used for converting a computer’s USB interface connection to the Serial Parallel Interface SPI used by SC-1887. Only two connections are required for use with SC-1887 and no external

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

TSSOP-28

Abstract: UCC5680 UCC5680PW24 UCC5680PW28
Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

TSSOP-28

Abstract: UCC5680 UCC5680PW24 UCC5680PW28
Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay

TSSOP-28

Abstract: UCC5680 UCC5680PW24 UCC5680PW28
Contextual Info: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay