SSOP14 package
Abstract: jedec MO-150 SSOP14 SOT337 MO-150
Text: PDF: 2000 Jan 04 Philips Semiconductors Package outline SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A A 3 A1 pin 1 index θ Lp L 7 1 detail X w M bp e 2.5 5 mm scale DIMENSIONS (mm are the original dimensions)
|
Original
|
PDF
|
SSOP14:
OT337-1
MO-150
SSOP14 package
jedec MO-150
SSOP14
SOT337
MO-150
|
Untitled
Abstract: No abstract text available
Text: SOT337-1 Standard product orientation 12NC ending 118 Rev. 01 — 28 July 2011 Packing information 1. Packing method Fig. 1 Package version 12NC ending Reel dimensions d x w mm SPQ/PQ (pcs) Reels per box Outer box dimensions l x w x h (mm) SOT337-1 118 330 x 16
|
Original
|
PDF
|
OT337-1
OT337-1
|
jedec MO-150
Abstract: ssop14 SSOP14 package MO-150
Text: PDF: 2003 Mar 24 Philips Semiconductors Package outline SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A A 3 A1 pin 1 index θ Lp L 7 1 detail X w M bp e 2.5 5 mm scale DIMENSIONS (mm are the original dimensions)
|
Original
|
PDF
|
SSOP14:
OT337-1
MO-150
jedec MO-150
ssop14
SSOP14 package
MO-150
|
Untitled
Abstract: No abstract text available
Text: Package outline SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A A 3 A1 pin 1 index θ Lp L 7 1 detail X w M bp e 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max.
|
Original
|
PDF
|
SSOP14:
OT337-1
MO-150
|
sot337
Abstract: No abstract text available
Text: PDF: 1999 Apr 16 Philips Semiconductors Package outline SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A A 3 A1 pin 1 index θ Lp L 7 1 detail X w M bp e 2.5 5 mm scale DIMENSIONS (mm are the original dimensions)
|
Original
|
PDF
|
SSOP14:
OT337-1
OT337-1
MO-150AB
sot337
|
SOT27-1
Abstract: 74hc SOT109-1 SOT163-1 sot27 SOT38 SOT402-1 SOT360-1 1/CN0944 SOT163
Text: INTEGRATED CIRCUITS DATA SHEET Package information January 1996 File under Integrated Circuits, IC06 Philips Semiconductors Package information PACKAGE INFORMATION PART NUMBER PIN COUNT DIL SO SSOP TSSOP 74HC/HCT00 14 SOT27-1 SOT108-1 SOT337-1 SOT402-1 74HC/HCT02
|
Original
|
PDF
|
74HC/HCT00
OT27-1
OT108-1
OT337-1
OT402-1
74HC/HCT02
SOT27-1
74hc
SOT109-1
SOT163-1
sot27
SOT38
SOT402-1
SOT360-1
1/CN0944
SOT163
|
74hc733
Abstract: 74HC73 74HC73N 74HC73D 74HC73DB 74HC73PW JESD22-A114E SSOP14 SSOP14 package
Text: 74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev. 04 — 19 March 2008 Product data sheet 1. General description The 74HC73 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A. It is pin compatible with Low-power Schottky TTL LSTTL .
|
Original
|
PDF
|
74HC73
74HC73
74hc733
74HC73N
74HC73D
74HC73DB
74HC73PW
JESD22-A114E
SSOP14
SSOP14 package
|
21A1
Abstract: 74LV125DB 74HC125 74HCT125 74LV125 74LV125D 74LV125N 74LV125PW JESD22-A114E
Text: 74LV125 Quad buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC125 and 74HCT125. The 74LV125 provides four non-inverting buffer/line drivers with 3-state outputs. The
|
Original
|
PDF
|
74LV125
74LV125
74HC125
74HCT125.
21A1
74LV125DB
74HCT125
74LV125D
74LV125N
74LV125PW
JESD22-A114E
|
CBT3126
Abstract: CBT3126D CBT3126DB CBT3126DS CBT3126PW JESD22-A114E JESD78 sot337-1and sot403-1and
Text: CBT3126 Quad FET bus switch Rev. 03 — 9 December 2008 Product data sheet 1. General description The CBT3126 is a quad FET bus switch with independent line switches. Each switch is disabled when the associated Output Enable OE input is LOW. The CBT3126 is characterized for operation from −40 °C to +85 °C.
|
Original
|
PDF
|
CBT3126
CBT3126
126-type
JESD78
JESD22-A114E
JESD22-A115-A
JESD22-C101C
CBT3126D
CBT3126DB
CBT3126DS
CBT3126PW
sot337-1and
sot403-1and
|
prtr5v0u6s
Abstract: csp1040 TSSOP20 FOOTPRINT ip4065cx11 smd transistor GY sot89 IP4065CX11/LF BV 9y transistor smd IP4058CX8/LF IP4280CZ10 smd transistor GY
Text: Dark Green − NXP‘s transfer to halogen-free products Why Dark Green? We as NXP are deeply committed to developing eco-friendly products and integrating environmental safety aspects in all manufacturing processes. For our packaging technology this meant a shift to lead-free and halogen-free “Dark Green”, years
|
Original
|
PDF
|
2002/95/EC.
PMBTA42
PMEG3005EL
PMEG6010EP
PMR780SN
PTVS12VS1UR
PZU13y
PMBTA42DS
PMEG3005ET
PMEG6010ER
prtr5v0u6s
csp1040
TSSOP20 FOOTPRINT
ip4065cx11
smd transistor GY sot89
IP4065CX11/LF
BV 9y transistor smd
IP4058CX8/LF
IP4280CZ10
smd transistor GY
|
74HC27
Abstract: dhvqfn14 74HC27N 74HC27BQ 74HC27D 74HC27DB 74HC27PW 74HCT27 JESD22-A114E HCT273
Text: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.
|
Original
|
PDF
|
74HC27;
74HCT27
74HCT27
JESD22-A114E
JESD22-A115-A
74HC27N
DIP14
74HC27
dhvqfn14
74HC27N
74HC27BQ
74HC27D
74HC27DB
74HC27PW
HCT273
|
dhvqfn14
Abstract: 74HC32 74HCT32 74LV32 74LV32D 74LV32DB 74LV32N 74LV32PW JESD22-A114E
Text: 74LV32 Quad 2-input OR gate Rev. 03 — 9 November 2007 Product data sheet 1. General description The 74LV32 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC32 and 74HCT32. The 74LV32 provides a quad 2-input OR function. 2. Features
|
Original
|
PDF
|
74LV32
74LV32
74HC32
74HCT32.
JESD22-A114E
JESD22-A115-A
dhvqfn14
74HCT32
74LV32D
74LV32DB
74LV32N
74LV32PW
|
74HC164N PIN DIAGRAM
Abstract: 74hc164n 74HCT164 application note 74HC164 74HCT164 74HCT164BQ 74HC164D 74HC164DB 74HCT164D 74HCT164DB
Text: 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with JEDEC
|
Original
|
PDF
|
74HC164;
74HCT164
74HCT164
HCT164
74HC164N PIN DIAGRAM
74hc164n
74HCT164 application note
74HC164
74HCT164BQ
74HC164D
74HC164DB
74HCT164D
74HCT164DB
|
74HCU04
Abstract: 74HCu04 oscillator application note dhvqfn14 NXP 74HCU04D 74HCU04D 74HCU04DB 74HCU04N 74HCU04PW
Text: 74HCU04 Hex inverter Rev. 3 — 16 September 2010 Product data sheet 1. General description The 74HCU04 is high-speed Si-gate CMOS devices and is pin compatible with low power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard No. 7A.
|
Original
|
PDF
|
74HCU04
74HCU04
JESD22-A114F
JESD22-A115-A
OT27-1
74HCU04N
DIP14
74HCu04 oscillator application note
dhvqfn14
NXP 74HCU04D
74HCU04D
74HCU04DB
74HCU04N
74HCU04PW
|
|
|
74HC4024
Abstract: 4000B 74HC4024D 74HC4024DB 74HC4024N 74HC4024PW
Text: 74HC4024 7-stage binary ripple counter Rev. 4 — 29 September 2010 Product data sheet 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with JEDEC
|
Original
|
PDF
|
74HC4024
74HC4024
4000B
74HC4024D
74HC4024DB
74HC4024N
74HC4024PW
|
SCHMITT-TRIGGER application
Abstract: 74LVC74A
Text: INTEGRATED CIRCUITS 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC24 Data Handbook Philips Semiconductors 1998 Jun 17 Philips Semiconductors Product Specification Dual D-type flip-flop with set and reset;
|
Original
|
PDF
|
74LVC74A
74LVC74A
SCHMITT-TRIGGER application
|
Untitled
Abstract: No abstract text available
Text: 74HC107; 74HCT107 Dual JK flip-flop with reset; negative-edge trigger Rev. 3 — 18 November 2013 Product data sheet 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock CP and reset (R) inputs and complementary Q and Q
|
Original
|
PDF
|
74HC107;
74HCT107
74HCT107
HCT107
|
Untitled
Abstract: No abstract text available
Text: 74LVC126A Quad buffer/line driver with 5 V tolerant input/outputs; 3-state Rev. 8 — 8 April 2014 Product data sheet 1. General description The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs, which are controlled by the output enable input nOE . A LOW at nOE causes the outputs
|
Original
|
PDF
|
74LVC126A
74LVC126A
|
mini inverter circuit schematic diagram
Abstract: dc to ac inverter schematic diagram schematic diagram ac inverter inverter schematic 12 to 220 inverter 12v to 220 v ac inverter SCHEMATIC DIAGRAM 220 V inverter 12 V dc ac inverter reference design DIP14, inverter, high voltage frequency inverter schematic
Text: INTEGRATED CIRCUITS 74LVU04 Hex inverter Product specification Supersedes data of 1997 Feb 12 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 Philips Semiconductors Product specification Hex inverter 74LVU04 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V
|
Original
|
PDF
|
74LVU04
74LVU04
74HCU04.
mini inverter circuit schematic diagram
dc to ac inverter schematic diagram
schematic diagram ac inverter
inverter schematic
12 to 220 inverter
12v to 220 v ac inverter SCHEMATIC DIAGRAM
220 V inverter 12 V
dc ac inverter reference design
DIP14, inverter, high voltage
frequency inverter schematic
|
JESD22-A115
Abstract: JESD78 SSOP14 TSSOP14 CBT3125 JESD22-A114
Text: INTEGRATED CIRCUITS CBT3125 Quadruple FET bus switch Product data File under Integrated Circuits — ICL03 Philips Semiconductors 2001 Dec 12 Philips Semiconductors Product data Quadruple FET bus switch CBT3125 DESCRIPTION PIN CONFIGURATION The CBT3125 quadruple FET bus switch features independent line
|
Original
|
PDF
|
CBT3125
ICL03
CBT3125
125-type
JESD78
JESD22-A115
SSOP14
TSSOP14
JESD22-A114
|
74ABT
Abstract: 74ABT126 74ABT126D 74ABT126DB 74ABT126PW
Text: INTEGRATED CIRCUITS 74ABT126 Quad buffer 3-State Product data Supersedes data of 1998 Jan 16 Philips Semiconductors 2002 Dec 13 Philips Semiconductors Product data Quad buffer (3-State) 74ABT126 FEATURES DESCRIPTION • Quad bus interface • 3-State buffers
|
Original
|
PDF
|
74ABT126
74ABT126
74ABT
74ABT126D
74ABT126DB
74ABT126PW
|
74LVC27
Abstract: 74LVC27PW
Text: INTEGRATED CIRCUITS 74LVC27 Triple 3-input NOR gate Product specification Supersedes data of 1998 Apr 06 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 FEATURES DESCRIPTION
|
Original
|
PDF
|
74LVC27
74LVC27
74LVC27PW
|
74LV126
Abstract: 74LV126PW
Text: INTEGRATED CIRCUITS 74LV126 Quad buffer/line driver 3-State Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV126
|
Original
|
PDF
|
74LV126
74LV126
74HC/HCT126.
74LV126PW
|
74ABT74
Abstract: 74ABT74PW
Text: Philips Semiconductors Product specification Dual D-type flip-flop 74ABT74 QUICK REFERENCE DATA SYMBOL DESCRIPTION CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.0 2.5 ns 0.5 ns tPLH tPHL Propagation delay CPn to Qn, Qn tOSLH tOSHL Output to Output skew
|
Original
|
PDF
|
74ABT74
74ABT74
74ABT
500ns
SH00067
74ABT74PW
|
