SOPB Search Results

6287F

Abstract: sopb
Contextual Info: BA6287F Reversible-motor driver The BA6287F is a reversible motor driver suitable for single motors. Dimensions Units : mm BA6287F (SOPB) Features • available in a SOP8 package • supply voltage range (4.5 -15 V) • power dissipation (650 mW) • output motor driving current up to

iron ETA

Abstract: ACT 6040
Contextual Info: DO N O T S C A L E THIRD ANGLE METRI'C PROJECTION A # € 3 F J RST-M AKE-LAST-BREAK CONTACT LENGTH. ACTIO N-PJN AREA SUITABLE FOR P .C .B .-T H IC K N E S S 1 ,6 iron. P . C . B . HOLE DRILLED HOLE FIN. HOLE AFTER REFLOW Cv*thks SoPb-fcbfcs 0 1 M. A C T IO N P IN

Contextual Info: HOLTEK r r HT93L C66 4K 3-Wire CMOS Serial EEPROM Features • • • • • A utom atic erase-before-w rite operation Word/chip erase an d w rite operation Write operation w ith built-in tim er Softw are controlled w rite protection 10-year d ata retention afte r 100K rewrite

Contextual Info: HOLTEK r r HT93L C56 2K 3-Wire CMOS Serial EEPROM Features • • • • • Automatic erase-before-write operation Word/chip erase and write operation Write operation with built-in timer Software controlled write protection 10-year data retention after 100K rewrite

XR88C92

Abstract: 88C92 XR88C192
Contextual Info: Preliminary Information XR88C92/192 DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER DESCRIPTION The XR88C92/192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 XR88C92 / 16 (XR88C192) bytes transmit and receive FIFO. The XR88C92/192 is a pin and functional replacement for the

88c681

Contextual Info: XR-88C681 CMOS Dual Channel UART DUART JTE X A R A u g u s t 1997-2 FEATURES Two Full Duplex, Independent Channels Asynchronous Receiver and Transmitter Quadruple-Buffered Receivers and Dual Buffered Transmitters Programmable Stop Bits in 1/16 Bit Increments

BD3010AFV

Contextual Info: Data eet Datasheet 200mA 2 A LDO O Regulattor with w V Voltag ge De etecto or and d Watchdo og Timer BD3010AFV B V-M Ge eneral Descrription Key K Specifica ations  Regulato or Supply Volttage Range: 5.6 V to 36 6V Range:  WDT Su upply Voltage R 6.0 V to 36

Contextual Info: TO SHIBA TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 131,072-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC551001CPI/CFI/CFTI/CTRI/CSTI/CSRI is a 1,048,576-bit static random access memory SRAM

Contextual Info: TO SHIBA TC551001BPL/BFL/BFTL/BTRL/BSTL/BSRL-70V,-85V,-10V TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 131,072-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC551001BPL/BFL/BFTL/BTRL/BSTL/BSRL is a 1,048,576-bit static random access memory SRAM organized as 131,072 words bv 8 bits. Fabricated using Toshiba’s CMOS Silicon gate process technology, this

88c684

Abstract: 68C684/E
Contextual Info: EXflR XR-82C684 I CMOS Quad Channel UART QUART GENERAL DESCRIPTION CM «- The EXAR Quad Universal Asynchronous Receiver and transmitter (QUART) is a data communications device that provides four fully independent full duplex asyn­ chronous communications channels in a single pack­

Contextual Info: Introduktion MODELL BRUKSANVISNING Uppställning XG-MB65X-L XG-MB55X-L XR-10X-L/XR-10S-L Snabbstart MULTIMEDIAPROJEKTOR Anslutningar Grundläggande tillvägagångssätt Praktiska funktioner Bilaga VIKTIGT • För att underlätta rapportering ifall projektorn skulle bli stulen bör du skriva

melody IC

Abstract: 8 sound effects generator IC 16-DIP HT2887 8050 s cmos sound generator d 9329 TOY SOUND sound effects chip SK 8050 S
Contextual Info: HOLTEK r r HT2887 Sound Effect and Melody Generator Features Auto power-off function Directly drive LED s or a piezo L O l or L 0 2 pad by m ask option 128-note melody PLA memory 256-note sound effect memory 128kHz system clock Minimum external components

ht93c46

Contextual Info: HOLTEK r r HT93C46 CMOS 1K-Bit Serial EEPROM Features • • • • • • • Program m ing S tatus Indicator Software and hardw are controlled w rite protection 10-year d ata retention after 100K rew rite cycles 106 rew rite cycles per word Operating tem perature range: —40°C—h85°C

HT447K0

Abstract: HT447P0 PC10 54475 holtek trace code
Contextual Info: HT447K0/447P0 4-bit Microcontrollers HT447K0/447P0 SPECIFICATION Features • Operating voltage: 2.4V~5V • Data memory RAM 32 x 4 size for HT447K0 64 × 4 size for HT447P0 • RC or crystal oscillator circuit as system clock • A high driving output line with or without

memory interfacing to mp 8085 8086 8088

Abstract: 82c684cj 82c684 block diagram of processor 80486 intel 8085 and motorola 6800 1C16 LS 74LS138 function and details in microprocessor 8085
Contextual Info: XR -82C 684 C Y V I B t / V i r \ I C M O S Q uad C hannel U AR T Q U A R T August 1997-2 FEATURES • Four Full-Duplex, Independent Channels • Two Multi-function 16-bit Counter/Timers • Asynchronous Receiver and Transmitter • • Quadruple-Buffered Receivers and Transmitters

68C681CJ

Abstract: 68C681 88c681 68c681.h XR-68C681CJ XR68C681
Contextual Info: XR-68C681 CMOS Dual Channel UART DUART August 1997-2 FEATURES • Two Full Duplex, Independent Channels • Interrupt Vector Output on Acknowledge • Asynchronous Receiver and Transmitter • 8 General Purpose Outputs • Quadruple-Buffered Receiver, Dual Buffered

Xuint32

Abstract: IPIF XAPP967 ML403 X967 vhdl code for 4 channel dma controller
Contextual Info: Application Note: Embedded Processing Creating an OPB IPIF-based IP and Using it in EDK R XAPP967 v1.1 February 26, 2007 Abstract Author: Mounir Maaref Adding custom logic to an embedded design targeting the Xilinx FPGA can be achieved using different methods and techniques. This application note focuses on using the EDK OPB IPIF

Virtex-4QV

Abstract: microblaze interface of jtag to UART in VHDL Virtex4 uart uart vhdl code fpga uart vhdl fpga virtex 6 spartan6 datasheet vhdl spartan 3a vhdl code for uart communication Spartan-6 FPGA
Contextual Info: MicroBlaze Debug Module MDM (v1.00f) DS641 June 24, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the MicroBlaze™ Debug Module (MDM) which enables JTAG-based debugging of one or more MicroBlaze processors.

82C66

Contextual Info: XR-82C684 J S fE X A R Preliminary Information CMOS Quad Channel UART QUART GENERAL DESCRIPTION FEATURES The EXAR Quad Universal Asynchronous Receiver and Transmitter (QUART) is a data communications device that provides four fully independent full duplex

Contextual Info: S IEM EN S Dual Channel Codec Filter SICOFI -2 PEB 2260 PEF 2260 CMOS 1C Features • Dual channel single chip codec and filter • Band limitation according to all CCITT and AT&T recommendations • Digital signal processing techniques • PCM encoded digital voice transmission

Contextual Info: UG93C66 4K Bit 512 x 8 or 256 x 16 3-Wire CMOS Serial EEPROM Description The UG93C66 is a 4K-bit low voltage nonvolatile, serial electrically erasable programmable read only memory device using the CMOS floating gate process. Its 4096 bits of memory are organized into 256 words of 16 bits each

Contextual Info: 6 7 THIS JÊL DRAWING C O P Y R IG H T 15 U N P U B L IS H E D . RELEASED 19 BY AMP IN COR POR ATE D. ALL FOR 2 3 ,19 PUBLICATION R IG H T S 4 5 DI ST LOC R ES ER V ED . AD REVISIONS 4T DESCRIPTION A CONNECTOR ASSEM BLY E X A M P L A R Y LOADED C120638-1 CONTACT

Ericsson PBC 6200

Abstract: ericsson PBC 6500 NTP 7513 pbc 05 ericsson 74LSO4 LM356 LM356 IC circuit diagram TE 555-1 ntp 3200 ic digital amplifier PEB 2050 N V2.2
Contextual Info: ICs for Communications Signal Processing Codec Filter SICOFI , SICOFI®-2 User’s Manual 03.92 PEB 2060; PEB 2260 Revision History: Original Version 03.92 Previous Releases: Page Subjects changes since last revision Edition 03.92 This edition was realized using the software system FrameMaker.

microblaze web server

Abstract: ML403 lwIP xilinx ML402 virtex-4 fx12 evaluation board UCF virtex-4 ML401 ML402 XAPP433 XC4VSX35-FF668-10C
Contextual Info: Application Note: Virtex-4 Family R XAPP433 v2.2 October 13, 2006 Embedded System Example: Web Server Design Using MicroBlaze Soft Processor Authors: Robert Armstrong, Martin Muggli, Matthew Ouellette, and Sathyanarayanan Thammanur Summary This application note describes an embedded system example design of a Web server running