SN74LV32D Search Results
SN74LV32D Price and Stock
Rochester Electronics LLC SN74LV32DBRIC GEN PURP |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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SN74LV32DBR | Bulk | 2,184 |
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Texas Instruments SN74LV32DBRSN74LV32DBR |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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SN74LV32DBR | 6,000 | 2,272 |
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SN74LV32DBR | 8,000 | 1 |
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SN74LV32D Datasheets (8)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
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SN74LV32D |
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Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 | Original | |||
SN74LV32D |
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QUADRUPLE 2-INPUT POSITIVE-OR GATE | Original | |||
SN74LV32D |
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QUADRUPLE 2-INPUT POSITIVE-OR GATE | Scan | |||
SN74LV32DB |
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QUADRUPLE 2-INPUT POSITIVE-OR GATE | Original | |||
SN74LV32DB |
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SN74LV32 - IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT OR GATE, PDSO14, Gate | Original | |||
SN74LV32DB |
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QUADRUPLE 2-INPUT POSITIVE-OR GATE | Scan | |||
SN74LV32DBLE |
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Quadruple 2-Input Positive-OR Gate 14-SSOP -40 to 85 | Original | |||
SN74LV32DR |
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Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 | Original |
SN74LV32D Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) |
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SN54LV32, SN74LV32 SCLS188C MIL-STD-883C, JESD-17 300-mil SN54LV32 SN74LV32 | |
Contextual Info: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) |
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SN54LV32, SN74LV32 SCLS188C MIL-STD-883C, JESD-17 300-mil SN54LV32 SN74LV32 | |
Contextual Info: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 SN54LV32 . . . J OR W PACKAGE SN74LV32 . . . D, DB, OR PW PACKAGE TOP VIEW D EPIC (Enhanced-Performance Implanted D D D D 1A 1B 1Y 2A 2B 2Y GND |
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SN54LV32, SN74LV32 SCLS188C SN54LV32 | |
SN74LV32
Abstract: SN74LV32D SN74LV32DBLE SN74LV32DR SN74LV32PWLE LV32 SN54LV32
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SN54LV32, SN74LV32 SCLS188C MIL-STD-883C, JESD-17 300-mil SN74LV32 SN74LV32D SN74LV32DBLE SN74LV32DR SN74LV32PWLE LV32 SN54LV32 | |
Contextual Info: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) |
Original |
SN54LV32, SN74LV32 SCLS188C MIL-STD-883C, JESD-17 300-mil SN54LV32 SN74LV32 | |
Contextual Info: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) |
Original |
SN54LV32, SN74LV32 SCLS188C MIL-STD-883C, JESD-17 300-mil SN54LV32 SN74LV32 | |
Contextual Info: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) |
Original |
SN54LV32, SN74LV32 SCLS188C MIL-STD-883C, JESD-17 300-mil SN54LV32 |