SLAD002 Search Results

IMSG176/8

Contextual Info: TVP3027 VIDEO INTERFACE PALETTE XLAS106-MAY 1995 • Direct Interfacing to Video RAM • Supports Color Depths of 4-, 8-, 16-, 24-, and 32-Blt/Plxel • 64-Bit-Wide Pixel Bus • Supports Overscan For Creation of Custom Screen Borders • Color-Keyed Switching of Direct Color and

ramdac

Abstract: ramdac 800 600 vga TVP3703
Contextual Info: TVP3703 VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC XLAS10 0 - FEBRUARY 1995 • Fully Integrated Dual Clock Synthesizer and 16-Blt Pixel Port True-Color RAMDAC • Functionally Interchangeable with STG1703 Programmable Power-Down Features On-Chip Cyclic Redundancy Check CRC

IMSG176

Abstract: VGA MOTHERBOARD CIRCUIT diagram TVP3020 TVP3020-170PCE TVP3020-200MDN Direct Replacement TEXAS
Contextual Info: TVP3020 VIDEO INTERFACE PALETTE XLAS080A- MAY 1995 • Second-Generation Video Interface Palette • Supports System Resolutions of: - 1600 x 1280 x 1 ,2 , 4, 8 ,1 6 ,2 4 Bits/Pixel at 60-Hz and 72-Hz Refresh Rate - 1280 x 1024 x 1, 2, 4, 8 ,1 6 , 24 Bits/Pixel

BROOKTREE

Abstract: TLC34058 TVP2002FN 400 MHz DIVIDE BY 10
Contextual Info: TVP2002 CLOCK DRIVER X LAS083- MAY 1995 135-MHz Operation FN PACKAGE TOP VIEW Differential E C L C lo ck Generation Divide by 3, 4, 5, or 8 of the Clock 5 < ÙJ ÙJ Divide by 2 and 4 of the Load h- R esets Pipeline Delay of the TLC34058 t/) u- r 9 < < uj ui > > o z z

bt485

Abstract: 86C928
Contextual Info: I TVP3025 VIDEO INTERFACE PALETTE X LA S 090- MAY 1995 • RCLK/SCLK/LCLK Data Latching Allows Flexible Control of VRAM Timing • 64-Bit Wide Pixel Bus • Compatible With the S3 Vislon964 and 86C928 I • Direct Interfacing to Video RAM • Brooktree BT485 Register Map Emulation

system on a chip graphics

Abstract: ATI MACH 32 68800 MACH 32 bt476 TLC34077
Contextual Info: I TLC34077 VIDEO INTERFACE PALETTE XLAS045 - APRIL 1995 • Versatile Multiplexing Interface Allows Lower Pixel Bus Rate • 256-Word Color Palette RAM • On-Chip Voltage Reference • High Level of Integration Provides Lower System Cost and Complexity |

Contextual Info: ! TVP3030 VIDEO INTERFACE PALETTE XLAS111 - MAY 1995 Supports System Resolutions up to 1600 x 1280 at 86-Hz Refresh Rate Versatile Pixel Bus Interface Supports Little- and Big-Endian Data Formats Supports Color Depths of 4-, 8-, 16-, 24-, and 32-Blt/Pixel, All at Maximum Resolution

inmos IMSG176

Abstract: texas instruments ttl manual Inmos TMS34010 TLC34075 TLC34075-110AFN TLC34075-66AFN TLC34075-85AFN TLC34075A video split screen circuit diagram
Contextual Info: TLC34075A VIDEO INTERFACE PALETTE X L A S 0 5 8 - MAY 1995 • • • • • • • • TTL-Compatible Inputs Standard MPU Interface Pixel Word Mask On-Chip Clock Selection True Color Direct Addressing Mode Directly Interfaces to Video RAM Supports Split Shift Register Transfers

TLC34074-170FN

Abstract: TLC34074 TLC34074-135FN TLC34074-170 SLAD002
Contextual Info: TLC34074 VIDEO INTERFACE DIGITAL-TO-ANALOG CONVERTER X L A S 0 5 6 - MAY 1995 • Versatile Multiplexing Interface Allows Lower Pixel Bus Rate • 135-, 170-, and 200-MHz Versions • High Level of Integration Provides Lower System Cost and Complexity • RS-343A-Compatible Outputs

ATT20C409

Abstract: ATT21C498
Contextual Info: I TVP3409 VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC • On-Chip PLL Clock Doubler - 85 MHz Input - 170 MHz Pixel Output features • Functionally Interchangeable With ATT20C409 • 256 x 24 Color RAM • 170/135 MHz - 170 MHz 2:1 Multiplexer Rate for 8-Bit

RS-343-A

Abstract: B1458 bt458 TLC34058-135FN RS-343A "functionally interchangeable" TLC34058 TLC34058-110FN TLC34058-80FN
Contextual Info: TLC34058 256 x 24 COLOR PALETTE _ X L A S 05 0 -A P R IL 1995 • • • • CMOS Technology 135-MHz Pipelined Architecture Available Clock Rate. . . 80,110,135 MHz Dual-Port Color RAM 256 Words x 24 Bits Bit-Plane Read and Blink Masks

ramdac

Abstract: VGA ramdac ATT21C498 EEL16 8-bit VGA ramdac eel -16 TVP3409-170 "functionally interchangeable" TVP3409 TVP3409-135CFN
Contextual Info: TVP3409 VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC XLAS092 - MAY 1995 On-Chip PLL Clock Doubler - 85 MHz Input - 170 MHz Pixel Output 256 x 24 Color RAM Software Compatible With the AT&T ATT20C498/499/409 68-Terminal Plastic Leaded Chip Carrier PLCC Package

Truevision

Contextual Info: TVP3010 VIDEO INTERFACE PALETTE XLAS082 - MAY 1995 • Second-Generation Video Interface Palette I • On-Chip Hardware Cursor: - 64 x 64 x 2 Cursor XGA Functionally Compatible - Full-Wlndow Crosshair - Dual-Cursor Mode • 85-, 110-, 135- and 170-MHz Versions

1740C

Contextual Info: TVP3026 VIDEO INTERFACE PALETTE _ XLAS098A - MAY 1995 • Supports System Resolutions up to 1600 x 1280 at 76-Hz Refresh Rate • Versatile Pixel Bus Interface Supports Little- and Big-Endian Data Formats • Supports Color Depths of 4-, 8-, 16-, 24-,

34076-135

Abstract: TLC 34076-135FN TLC34076
Contextual Info: TLC34076 VIDEO INTERFACE PALETTE X LA S 076 - MAY 1995 | • CMOS Technology • 256-Word Color Palette RAM • Versatile Multiplexing Interface Allows Lower Pixel Bus Rate • High Level of Integration Provides Lower System Cost and Complexity • Palette Page Register

RS-343A

Abstract: BROOKTREE tms34010 TMS34020 motherboard ga TMS34010 TLC34075 TLC34076 TLC34076-85FN
Contextual Info: TLC34076 VIDEO INTERFACE PALETTE XLAS076 - MAY 1S • CMOS Technology • Versatile Multiplexing Interface Allows Lower Pixel Bus Rate • High Level of Integration Provides Lower System Cost and Complexity • Direct VGA Pass-Through Capability • Versatile Pixel Bus Interface Supports

Contextual Info: TVP3030 VIDEO INTERFACE PALETTE X L A S 1 1 1 -M A Y 1995 • Supports System Resolutions up to 1600 x 1280 at 86-Hz Refresh Rate • Versatile Pixel Bus Interface Supports Little- and Big-Endian Data Formats • Supports Color Depths of 4-, 8-, 16-, 24-,

system on a chip graphics

Abstract: ATI MACH 32 TLC340771 bt476 TLC34077
Contextual Info: TLC34077 VIDEO INTERFACE PALETTE X L A S 0 4 5 -A P R IL 1995 • Versatile Multiplexing Interface A llow s Lower Pixel B u s Rate • 256-Word C o lo r Palette RAM • O n-Chip Voltage Reference • RS-343A-Com patible Outputs a TTL-Com patible Inputs # Standard MPU Interface

RS-343-A

Contextual Info: TLC34058 256 x 24 COLOR PALETTE XLAS050 -A P R IL 1995 • CMOS Technology • Direct Interface to TMS340XX Graphics Processors • 135-MHz Pipelined Architecture • Standard Microprocessor Unit MPU Palette Interface • Available Clock R ate. . . 80,110,135 MHz

bt485

Abstract: 86C928 S3 Graphics
Contextual Info: TVP3025 VIDEO INTERFACE PALETTE _ XLA S 090 - MAY 1995 • RCLK/SCLK/LCLK Data Latching Allows Flexible Control of VRAM Timing • 64-Bit Wide Pixel Bus • Compatible With the S3 Vision964 and 86C928 • Direct Interfacing to Video RAM

TVP2002FN

Contextual Info: I TVP2002 CLOCK DRIVER XLAS063 - MAY 1995 135-MHz Operation FN PACKAGE TOP VIEW Differential ECL Clock Generation Divide by 3, 4, 5, or 8 of the Clock 52. 5LU LU —I _J CÛ CD Divide by 2 and 4 of the Load W LU Resets Pipeline Delay of the TLC34058 1.235-V Voltage Reference Output

Contextual Info: TLC34075A VIDEO INTERFACE PALETTE XLAS058-MAY 1995 • ■ • Versatile Multiplexing Interface Allows Lower Pixel Bus Rate • TTL-Compatible Inputs I I * High Level of Integration Provides Lower System Cost and Complexity • Pixel Word Mask I • Direct VGA Pass-Through Capability

texas instruments ttl manual

Abstract: ibm XGA scheme tv color motherboard ga targa VGA MOTHERBOARD CIRCUIT diagram TVP3010 TVP3010-110FN TVP3010-135FN TVP3010-170FN
Contextual Info: TVP3010 VIDEO INTERFACE PALETTE X L A S 0 8 2 - MAY 1995 • Second-Generation Video Interface Palette • Supports System Resolutions of: - 1600 x 1280 x 1, 2, 4, 8 ,1 6 Bits/Pixel at 60-Hz Refresh Rate - 1280 x 1024 x 1, 2, 4, 8 ,1 6 Bits/Pixel at 60-Hz and 72-Hz Refresh Rates