74LVT
Abstract: 74LVT00 74LVT00D 74LVT00PW
Text: Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT tpLH tpHL Propagation delay An or Bn to Yn CL = 50pF; V cc = 3-3V C|N Input capacitance V, = 0V or 3.0V
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OCR Scan
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74LVT00
14-Pin
74LVT00
74LVT00D
OT108-1
OT337-1
74LVT
74LVT00PW
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PDF
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Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Preliminary specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL PARAMETER LOGIC SYMBOL CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT 2.4 2.8 ns tPLH tPHL Propagation delay An or Bn to Yn CL = 50pF; VCC = 3.3V
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Original
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74LVT00
SA00334
74LVT
10MHz
500ns
SV00022
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PDF
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74LVT00
Abstract: 74LVT 74LVT00PW
Text: INTEGRATED CIRCUITS 74LVT00 3.3V Quad 2-input NAND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 15 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C;
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Original
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74LVT00
14-Pin
74LVT00
OT108Semiconductors
74LVT
74LVT00PW
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PDF
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS 74LVT00 3.3V Quad 2-input NAND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 15 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C;
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Original
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74LVT00
74LVT00PWDH
14-Pin
74LVT00
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PDF
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74ABT00
Abstract: 74ABT00D 74ABT00N 74ABT00PW
Text: Philips Sem iconductors Product specification Quad 2-input NAND gate 74ABT00 QUICK REFERENCE DATA SYMBOL LOGIC DIAGRAM CONDITIONS Tamb ~ 25°C; GND = 0V PARAMETER TYPICAL UNIT 2.5 2.0 ns 0.4 ns tpLH tpHL Propagation delay An or Bn to Yn toSLH tOSHL Output to
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OCR Scan
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74ABT00
SA00334
SA00360
mo-153
1995Sep18
7110fl2b
74ABT00
74ABT00D
74ABT00N
74ABT00PW
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PDF
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Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb “ 25°C; GND = 0V PARAMETER Propagation delay An or Bn to Yn tpLH tpHL LOGIC DIAGRAM TYPICAL 2.5 2.0 CL = 50pF; VCC = 5V UNIT AO BO A1
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OCR Scan
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74ABT00
SA00360
SQT402-1
MO-153
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PDF
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yn12
Abstract: No abstract text available
Text: Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 QUICK REFERENCE DATA PARAMETER tPLH ÌPHL Propagation delay An or Bn to Y n f OSLH toSHL Output to Output skew C|N Input capacitance V| = 0V or Vcc 'c c Total supply current Outputs disabled;
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OCR Scan
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74ABT00
SA00380
74ABT
500ns
yn12
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PDF
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74ABT
Abstract: 74ABT00 74ABT00PW
Text: INTEGRATED CIRCUITS 74ABT00 Quad 2-input NAND gate Product specification IC23 Data Handbook Philips Semiconductors 1995 Sep 18 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 QUICK REFERENCE DATA SYMBOL tPLH tPHL LOGIC DIAGRAM CONDITIONS
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Original
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74ABT00
74ABT
74ABT00
74ABT00PW
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