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    RFI 28 SLOT RECEIVER FRAME Search Results

    RFI 28 SLOT RECEIVER FRAME Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    BLM15PX121BH1D Murata Manufacturing Co Ltd FB SMD 0402inch 120ohm POWRTRN Visit Murata Manufacturing Co Ltd
    BLM15PX181SH1D Murata Manufacturing Co Ltd FB SMD 0402inch 180ohm POWRTRN Visit Murata Manufacturing Co Ltd
    BLM21HE802SN1L Murata Manufacturing Co Ltd FB SMD 0805inch 8000ohm NONAUTO Visit Murata Manufacturing Co Ltd
    BLM15PX330BH1D Murata Manufacturing Co Ltd FB SMD 0402inch 33ohm POWRTRN Visit Murata Manufacturing Co Ltd
    BLM15PX600SH1D Murata Manufacturing Co Ltd FB SMD 0402inch 60ohm POWRTRN Visit Murata Manufacturing Co Ltd

    RFI 28 SLOT RECEIVER FRAME Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.


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    PDF IXF6151 IXF6151 LXT6051 51Mb/s 155Mb/s GR-253-CORE.

    MTC27

    Abstract: 2x4 TTL demultiplexer Pentium MMX 166 Processor MTC13 KLM-1 DTC20 mtc10 VT1536 MTD23 MTD27
    Text: Intel IXF6151 28 T1/E1 Mapper Datasheet ® The Intel IXF6151 performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface. Further


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    PDF IXF6151 IXF6151 LXT6051 GR-253-CORE. MTC27 2x4 TTL demultiplexer Pentium MMX 166 Processor MTC13 KLM-1 DTC20 mtc10 VT1536 MTD23 MTD27

    DTC24

    Abstract: AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE
    Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.


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    PDF IXF6151 IXF6151 LXT6051 51Mb/s 155Mb/s GR-253-CORE. DTC24 AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE

    X1HB

    Abstract: telecom bus DM9000 application Digital Alarm Clock by using ttl LXT6251A 001H LXT6051 MTD10 LXT6282 MTC11
    Text: LXT6251A 21 E1 SDH Mapper Datasheet The LXT6251A 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom bus interface. Further processing by the companion


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    PDF LXT6251A LXT6251A LXT6051 X1HB telecom bus DM9000 application Digital Alarm Clock by using ttl 001H MTD10 LXT6282 MTC11

    X1HB

    Abstract: MTC13 LXT625 131-G W J 50
    Text: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper LXT General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard


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    PDF LXT6251 VC-12 VC-12s, PDS-6251-8/99-2 X1HB MTC13 LXT625 131-G W J 50

    san francisco telecom

    Abstract: X1HB 001H MTC21 SXT6251 MTC11 MTD16 P1396 MTC13 MTC15
    Text: DATA SHEET MAY 1998 Revision 1.1 SXT6251 21 E1 SDH Mapper General Description Features The SXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom


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    PDF SXT6251 SXT6251 SXT6051 san francisco telecom X1HB 001H MTC21 MTC11 MTD16 P1396 MTC13 MTC15

    230v 50 Hz CENTER TAP transformer

    Abstract: 48 VOLT 10 AMP smps torque settings chart for metric bolts ups 500va 220v 50hz circuit diagram 7400 pin configuration torque settings chart for metric brass bolts torque settings for metric bolts 48vdc smps circuit diagram step down transformer to convert 230v to 20v RFI filter schematic diagram
    Text: CORCOM Product Guide CORCOM Product Guide RFI Power Line Filters Tyco Electronics offers over 300 solutions for RFI problems associated with susceptibility, as well as compliance with international emissions standards. Tyco Electronics CORCOM Products World Headquarters


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    PDF D-85521 230v 50 Hz CENTER TAP transformer 48 VOLT 10 AMP smps torque settings chart for metric bolts ups 500va 220v 50hz circuit diagram 7400 pin configuration torque settings chart for metric brass bolts torque settings for metric bolts 48vdc smps circuit diagram step down transformer to convert 230v to 20v RFI filter schematic diagram

    DOCUMENTATION OF SHADOW ALARM

    Abstract: ndf 020-21
    Text: T1Mx28 Device DS1 Mapper 28-Channel TXC-04228 TECHNICAL OVERVIEW PRODUCT PREVIEW FEATURES DESCRIPTION • Twenty-eight independent 1.544 Mbit/s DS1 mappers • Single/dual byte-parallel Telecom Bus @ 6.48 MHz 28 slots or 19.44 MHz (84 slots) • Floating VT1.5 byte-synchronous mapping for use


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    PDF T1Mx28 28-Channel TXC-04228 VC-4/AU-3/TU-11) 5/TU-11 DOCUMENTATION OF SHADOW ALARM ndf 020-21

    ndf 020-21

    Abstract: No abstract text available
    Text: T1Mx28 Device DS1 Mapper 28-Channel TXC-04228 TECHNICAL OVERVIEW PRODUCT PREVIEW DESCRIPTION FEATURES The T1Mx28 is a 28-channel byte-synchronous and asynchronous DS1 mapper. Four field-proven DS1MX7 DS1 Mapper chips are interconnected in a single compact package to


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    PDF T1Mx28 28-Channel TXC-04228 VC-4/AU-3/TU-11) 5/TU-11 TXC-04228-MA ndf 020-21

    MTC27

    Abstract: 2x4 TTL demultiplexer 106 35K 045 226 35K AU-AIS Digital Alarm Clock by using ttl MTB 230 P03H GR-253-CORE IXF6151
    Text: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.


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    PDF IXF6151 IXF6151 LXT6051 51Mb/s 155Mb/s GR-253-CORE. MTC27 2x4 TTL demultiplexer 106 35K 045 226 35K AU-AIS Digital Alarm Clock by using ttl MTB 230 P03H GR-253-CORE

    Untitled

    Abstract: No abstract text available
    Text: T1Mx28 Device DS1 Mapper 28-Channel TXC-04228 DESCRIPTION • Twenty-eight independent 1.544 Mbit/s DS1 mappers • Single/dual byte-parallel Telecom Bus @ 6.48 MHz 28 slots or 19.44 MHz (84 slots) • Floating VT1.5 byte-synchronous mapping with signaling only for use with or without a slip buffer


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    PDF T1Mx28 28-Channel TXC-04228 VC-4/AU-3/TU-11) 5/TU-11 TXC-04228-MA

    ATM8

    Abstract: MPC860 MPC860SAR MPC860T 1j24a
    Text: MPC860 FAMILY DEVICE ERRATA REFERENCE October 7, 1999 This document is a compilation of all MPC860, MPC860SAR, and MPC860T device errata from Revision A.2 forward. Herein, the errata are classified and numbered, and each erratum is provided with a description and workarounds.


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    PDF MPC860 MPC860, MPC860SAR, MPC860T ATM8 MPC860SAR 1j24a

    GR-253-CORE

    Abstract: GR-499-CORE MT8980 ROB-1998 e1 E2 e3 liu transceiver NPRM
    Text: T1Fx8 Device 8-Channel T1 Framer TXC-03108 TECHNICAL OVERVIEW FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , auto search, and independent transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1; Gapped clock or marker; Auxiliary


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    PDF TXC-03108 TXC-03108-MA GR-253-CORE GR-499-CORE MT8980 ROB-1998 e1 E2 e3 liu transceiver NPRM

    Untitled

    Abstract: No abstract text available
    Text: T1Fx8 Device 8-Channel T1 Framer TXC-03108 FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , auto search, and independent transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1; Gapped clock or marker; Auxiliary


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    PDF TXC-03108 TXC-03108-MA

    1J24A

    Abstract: 855T MPC855T MPC860 MPC860CE MPC860SAR MPC860T 3K20A 855t user manual MF001
    Text: Freescale Semiconductor, Inc. Device Errata MPC860CE Rev. 1.8, 12/2003 Freescale Semiconductor, Inc. MPC860/855T Family Device Errata Reference This document is a compilation of all MPC855T, MPC860, MPC860SAR, and MPC860T device errata from Revision A.2 forward. Herein, the errata are classified and numbered, and


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    PDF MPC860CE MPC860/855T MPC855T, MPC860, MPC860SAR, MPC860T 1J24A 855T MPC855T MPC860 MPC860CE MPC860SAR MPC860T 3K20A 855t user manual MF001

    AS3909 AS3910

    Abstract: No abstract text available
    Text: AS3909/AS3910 13.56 MHz RFID Reader IC, ISO-14443 A/B General Description The AS3909/10 is a high performance 13.56MHz HF RFID Reader IC. The AS3909/10 is unequalled in the domain of HF Reader ICs; it contains two differential low impedance 1.5Ω antenna


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    PDF AS3909/AS3910 ISO-14443 AS3909/10 56MHz 2013-Oct ISO-14443B ISO-14443B, AS3909 AS3910

    1j24a

    Abstract: 15-2A MPC860 MPC860SAR MPC860T MPC862 860DE mpc860 users manual 2k20a "power designs" FEC12
    Text: MPC860 FAMILY DEVICE ERRATA REFERENCE July 30, 2001 The MPC860 User’s Manual has two User’s Manual errata which are explained below. These errata will be in the next revision of the User’s Manual Errata that goes out and deleted from the text below.


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    PDF MPC860 MPC860, MPC860SAR, MPC860T MC68160 1j24a 15-2A MPC860SAR MPC862 860DE mpc860 users manual 2k20a "power designs" FEC12

    quartz generator 27.12MHz

    Abstract: ipc 8109 Mifare commands nfc indicator and target block diagram HF RFID ISO15693* block diagram as3910-bqfp circuit diagram of 13.56MHz RF Generator nfc antenna design antenna as3910
    Text: Data Sheet AS3910 13.56 MHz RFID Reader IC, ISO-14443 A/B 1 General Description The AS3910 is a high performance 13.56MHz HF RFID Reader IC. With austriamicrosystems’ unique antenna management technology it is optimized for applications with directly driven antennas.


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    PDF AS3910 ISO-14443 AS3910 56MHz Reader/AS3910 quartz generator 27.12MHz ipc 8109 Mifare commands nfc indicator and target block diagram HF RFID ISO15693* block diagram as3910-bqfp circuit diagram of 13.56MHz RF Generator nfc antenna design antenna as3910

    quartz generator 27.12MHz

    Abstract: 27.12Mhz HF RFID loop antenna design AS3910 nfc pcb antenna nfc transmitter and receiver nfc transponder 14443 antenna as3910 rf receiver 27.12mhz nfc antenna
    Text: Data Sheet AS3910 13.56 MHz RFID Reader IC, ISO-14443 A/B 1 General Description The AS3910 is a high performance 13.56MHz HF RFID Reader IC. With austriamicrosystems’ unique antenna management technology it is optimized for applications with directly driven antennas.


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    PDF AS3910 ISO-14443 AS3910 56MHz ISO-14443B Reader/AS3910 quartz generator 27.12MHz 27.12Mhz HF RFID loop antenna design nfc pcb antenna nfc transmitter and receiver nfc transponder 14443 antenna as3910 rf receiver 27.12mhz nfc antenna

    nfc antenna design

    Abstract: nfc antenna 27.12MHz power amplifier nfc transponder 14443 quartz generator 27.12MHz AS3910 HF RFID loop antenna design nfc transmitter circuit RFID FELICA MIFARE Ultralight
    Text: Data Sheet AS3910 13.56 MHz RFID Reader IC, ISO-14443 A/B 1 General Description The AS3910 is a high performance 13.56MHz HF RFID Reader IC. With austriamicrosystems’ unique antenna management technology it is optimized for applications with directly driven antennas.


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    PDF AS3910 ISO-14443 AS3910 56MHz ISO-14443B Reader/AS3910 nfc antenna design nfc antenna 27.12MHz power amplifier nfc transponder 14443 quartz generator 27.12MHz HF RFID loop antenna design nfc transmitter circuit RFID FELICA MIFARE Ultralight

    AADD

    Abstract: XPS-AS GR-253-CORE GR253-CORE GR-499-CORE FPS-310 sot 23 mark AD
    Text: DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating VT1.5 Byte Synchronous mapping for


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    PDF TXC-04201B TU-11 5/TU-11 TXC-04201B-MB AADD XPS-AS GR-253-CORE GR253-CORE GR-499-CORE FPS-310 sot 23 mark AD

    dtc12

    Abstract: No abstract text available
    Text: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E l PDH signals into SDH. The PDH side interfaces with E l LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard


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    PDF LXT6251 LXT6251 LXT6051 VC-12 dtc12

    RFI 28 Slot Receiver Frame

    Abstract: LXT134
    Text: LXT134 2B+D TCM Integrated Quad Transceiver General Description The LXT134 is a fully integrated quad transceiver for high­ speed data transmission over unshielded twisted-pair subscriberloops. The device transmits at 160 kbps line rate 512 kbps over a single twisted pair wire, using a Time Compres­


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    PDF LXT134 RFI 28 Slot Receiver Frame

    TD03X

    Abstract: TD02X ACS 5s R22 K T h221 syncro
    Text: r=J SG S-THOMSON ^ 7#, [ M t M t ik t E O T i « ® S T H 221 MULDEX IC FOR MULTIMEDIA TELESERVICES • HCMOS SEA OF GATE TECHNOLOGY ■ 64 PINSQ UAD FLAT PACKAGE . TW O MODES OF OPERATION: STAND­ ALONE, MICROPROCESSOR ■ INTERFACE FOR 8/16/32 BIT MICROPROC­


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    PDF 64kbit/s TD03X TD02X ACS 5s R22 K T h221 syncro