REGENERATOR Search Results

RX-2B

Abstract: RX2C monitor Dell 2000fp dell monitor circuit diagram RX1A ISL54100 ISL54100CQZ ISL54101 ISL54101CQZ ISL54102
Contextual Info: Key IG Features NS W DES E N R O F ISL54100, ISL54101, ISL54102 DED OMMEN E THE 54102A SE ISLSheet D N A Data A 54101 0A, ISL ISL5410 C N OT R E June 4, 2008 FN6275.5 TMDS Regenerators with Multiplexers Features The ISL54100, ISL54101, ISL54102 are high-performance

pj 69 SMD diode

Abstract: RX-2B RX2C RX2b bs3-1000 Monitor VD58 smd diode pj 72 c8051f320-gq VD58 ISL54100
Contextual Info: ISL54100AHDMI-EVALZ, ISL54105ACRZ-EVALZ Operation Manual for Intersil’s 4:1 and 1:1 TMDS HDMI Regenerator Evaluation Kits Application Note April 1, 2009 AN1453.2 Thank you for requesting Intersil’s high-performance TMDS signal multiplexor/regenerator/retimer evaluation kit. This

ICS1522

Abstract: ICS1522M
Contextual Info: Integrated Circuit Systems, Inc. ICS1522 User-ProgrammableVideo Clock Generator/ Line-Locked Clock Regenerator General Description Features The ICS1522 is a very high performance monolithic phaselocked loop PLL frequency synthesizer. Utilizing ICS’s advanced CMOS mixed-mode technology, the ICS1522

9718h

Abstract: 11973H VC12 LEVEL ONE COMMUNICATIONS SXT6051 SXT framer HT 648 Decoder Rx 9802h
Contextual Info: DATA SHEET MAY 1998 Revision 1.1 SXT6051 STM-1/0 SDH Overhead Terminator General Description Features The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0

SY02-MFTC

Abstract: 33172 regenerator Crystal 10mhz RALTRON
Contextual Info: SYNCHRONOUS EQUIPMENT LOW IN/OUTPUT FREQUENCY CLOCK REGENERATOR LVPECL/LVCMOS OUTPUT SY02-MFTC Date: January 7,2004 SY02-MFTC • INTRODUCTION The SY02-MFTC is a high frequency crystal-based PLL synchronizer designed as a module level subsystem for easy incorporation into telecommunication equipment

Contextual Info: AUGUST 1989 PRELIMINARY INFORMATION S em icon ducto rs SP9944 200M-BIT/S DATA REGENERATOR T h e S P 9 9 4 4 is a d a ta re g e n e ra tio n c irc u it for u se in fib re o p tic re c e iv e rs a t b it ra te s u p to 2 2 0 M B /S . It has b e e n d e s ig n e d fo r u s e w ith P le s s e y 's S L 9 9 0 4 T ra n s im p e d a n c e

Contextual Info: w GEC PLESSEY PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS3109 2 2 MV1445 COMBINED PCM HDB3 DECODER, DIGITAL CLOCK REGENERATOR AND TIMESLOT ZERO RECEIVER The MV1445 com bines the HDB3 Decoder, Digital Clock Regnerator and Tim eslot Zero Receiver functions required by

4x2 mux

Contextual Info: ISL54100, ISL54101, ISL54102 Key Features Data Sheet March 30, 2007 FN6275.3 TMDS Regenerators with Multiplexers Features The ISL54100, ISL54101, ISL54102 are high-performance TMDS timing regenerators and multiplexers. The receiver contains a programmable equalizer and a clock data

Contextual Info: w GEC PLE SS EY OCTOBER 1993 S E M I C O N D U C T O R S MV1442 HDB3 ENCODER/DECODER/CLOCK REGENERATOR Supersedes June 1993 edition The MV1442, along with other devices in the GPS 2Mbit PCM signalling series comprise a group of circuits which will perform the common channel signalling and error detection

DAC-210

Abstract: DAC210 DAC211 DAC211D DAC214 Sync on Green
Contextual Info: 0LFURYLGHR 6HULHV  DAC210 Modules Serial Digital to Analogue RGB/YUV z z z z z Broadcast Quality Performance Multiple output capability Unique Clock Regenerator circuitry Blank to analogue line length Up to six cards in a single 1U frame DAC214 These modules are part of our Series 200 range and are intended for

MV1441

Abstract: DS3077 HDB3 MV1442 HDB3 to nrz HDB3 AMI ENCODER DECODER
Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MV1442 HDB3 Encoder/Decoder/Clock Regenerator

DS3077

Abstract: MV1441 MV1442 AMI Semiconductor encoder Digital Alarm Clock 40 pin AMI HDB3 APPLICATION
Contextual Info: MV1442 HDB3 Encoder/Decoder/Clock Regenerator DS3077 The MV1442, along with other devices in the Zarlink 2Mbit PCM signalling series comprise a group of circuits which will perform the common channel signalling and error detection functions for a 2.048Mbit PCM transmission link operating in

C3262

Contextual Info: ANALOG DEVICES Fiber CjbticFfecausr withQjartizer and Clock FfeccveryandDataFtetirring Æ 0O 6 FEATURES M eets CCITT G.958 Requirements for S TM -4 Regenerator— Type A M eets Bellcore TR-NWT-000253 Requirements for OC-12 O utput Jitter: 2.5 Degrees RMS 622 Mbps Clock Recovery and Data Retiming

RY 227

Abstract: chroma section function HA11417 L-11
Contextual Info: HA11417 Color TV Chroma Processor/Demodulator • FU NCTIO N S • • • • Chroma Amp. Subcarrier Regenerator Color Demodulator Flesh Correction ■ FE A TU R E S • • • • • • Color difference matrix DC tint control Three low-output-impedance drivers for direct coupling

ISL54106

Abstract: dell monitor circuit diagram ISL54106A dell display ic DVI TMDS PCB design guidelines TXC48 .000
Contextual Info: ISL54106 Key Features Data Sheet June 6, 2008 FN6724.0 TMDS Regenerator Features The ISL54106 is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of

SY02-MFTC

Contextual Info: SYNCHRONOUS EQUIPMENT LOW IN/OUTPUT FREQUENCY CLOCK REGENERATOR LVPECL/LVCMOS OUTPUT SY02-MFTC Date: Aug 4,2005 SY02-MFTC • INTRODUCTION The SY02-MFTC is a high frequency crystal-based PLL synchronizer designed as a module level subsystem for easy incorporation into telecommunication equipment

518400MH

Abstract: regenerator
Contextual Info: SYNCHRONOUS EQUIPMENT LOW IN/OUTPUT FREQUENCY CLOCK REGENERATOR LVPECL/LVCMOS OUTPUT SY02-MFTC Date: May 20, 2002 SY02-MFTC • INTRODUCTION The SY02-MFTC is a high frequency crystal-based PLL synchronizer designed as a module level subsystem for easy incorporation into telecommunication equipment

Contextual Info: AMR TN-X/40 322 Mbps SDH Transmission Features • Standard optical interfaces for seamless interconnectivity with other SDH network elements • Extension of OAM&P through Nortel Networks Integrated Network Management system • Flexible architecture: Add/Drop Multiplexer ADM terminal, passthrough terminal, end terminal and regenerator conigurations

Contextual Info: 19-1631; Rev 0a; 8/01 2.5Gbps, Low-Power, +3.3V Clock Recovery and Data Retiming IC Features ♦ Exceeds ANSI, ITU, and Bellcore SONET/SDH Regenerator Specifications This device operates from a +3.3V or +5.0V single supply over a -40°C to +85°C temperature range. Power

photodiode 40ghz

Abstract: MAX3831 MAX3866 MAX3876 MAX3876EHJ regenerator 28
Contextual Info: 19-1631; Rev 0a; 8/01 2.5Gbps, Low-Power, +3.3V Clock Recovery and Data Retiming IC Features ♦ Exceeds ANSI, ITU, and Bellcore SONET/SDH Regenerator Specifications This device operates from a +3.3V or +5.0V single supply over a -40°C to +85°C temperature range. Power

AN42

Abstract: Si5310 Si5310-BM lk 977
Contextual Info: Si5310 PRELIMINARY DATA SHEET P RECISION C LOCK M ULTIPLIER /R EGENERATOR IC Features Complete precision clock multiplier and clock regenerator device: Accepts Input Clock from 9.4–668 MHz ! ! ! Regenerates a “Clean”, JitterAttenuated Version of Input

optical regenerator

Abstract: DMS-3100DC003 WS200ER3R 10129126 DMS3100 waveshifter jdsu power supply lb 1260 GR-253 optical regenerator, consumption
Contextual Info: COMMUNICATIONS MODULES & SUBSYSTEMS WaveReady 3000 Series Unidirectional, Protocol and Data Rate Independent Optical Regenerator WaveShifter 200 ER 3R Key Features • Provides high transmit power with low power consumption and high receiver sensitivity –30 dBm

Kill CMOS

Abstract: SAA7345
Contextual Info: Philips Semiconductors Preliminary specification CMOS digital decoding 1C with RAM for Compact Disc SAA7345 FEATURES GENERAL DESCRIPTION • Integrated data slicer and clock regenerator The SAA7345 incorporates the CD signal processing functions of decoding and digital filtering. The device is

dell 2000fp

Abstract: tmds receiver dell monitor circuit diagram DVI dual link receiver 2000FP capture HDMI video IC monitor Dell 2000fp projector dell ISL54105A ISL54105ACRZ
Contextual Info: ISL54105A Key Features Data Sheet June 4, 2008 FN6716.0 TMDS Regenerator Features The ISL54105A is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of