Untitled
Abstract: No abstract text available
Text: Product Obsolete/Under Obsolescence R XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table Continued XC4013XLA Pinout Table PAD NAME PQ160 PQ208 PQ240 I/O – – P21 BG256 H1 PAD NAME PQ160 PQ208
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XC4000XLA
XC4013XLA
PQ160
PQ208
PQ240
BG256
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PQ208
Abstract: HQ240 HQFP HQ208 PQ160 HQ160 PQ240 PQ-44
Text: Package Drawings PQ/HQFP Packages - PQ44, PQ160, PQ208, PQ240, HQ160, HQ208, HQ240 10-30 November 13, 1997 Version 1.2
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PQ160,
PQ208,
PQ240,
HQ160,
HQ208,
HQ240
PQ208
HQ240
HQFP
HQ208
PQ160
HQ160
PQ240
PQ-44
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HQ240
Abstract: HQFP HQ160 HQ208 PK007 PQ160 PQ208 PQ240
Text: R PK007 v1.0 June 1, 2000 PQFP (PQ44, PQ160, PQ208, PQ240) Packages HQFP (Heat Sink) (HQ160, HQ208, HQ240) Packages 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
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PK007
PQ160,
PQ208,
PQ240)
HQ160,
HQ208,
HQ240)
HQ240
HQFP
HQ160
HQ208
PK007
PQ160
PQ208
PQ240
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HQ240
Abstract: PQ208 HQ240 XILINX
Text: R PK007 v1.1 April 6, 2001 PQFP (PQ44, PQ160, PQ208, PQ240) Heat Sink PQFP (HQ160, HQ208, HQ240) Package 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
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PK007
PQ160,
PQ208,
PQ240)
HQ160,
HQ208,
HQ240)
HQ240
PQ208
HQ240 XILINX
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PQG160
Abstract: PQ160 PK007
Text: R PQFP PQ160/PQG160 Package PK007 (v1.2) June 18, 2004 2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
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PQ160/PQG160)
PK007
PQG160
PQ160
PK007
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Pl84
Abstract: No abstract text available
Text: Component Selector Guide April 1999 1999 Actel Corporation 1 Package Speed Grade SRAM Bits JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, –1, –2, –3 78 8,000 256 512 — — Yes Yes — — Yes PQ208 Std, –1, –2, –3 129 8,000
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A54SX08
VQ100
PQ208
TQ144
TQ176
Pl84
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RT54SX72SCQ208
Abstract: A42MX16 RT54SX32S-CQ208 CQ208 CQ256
Text: v3.0 Component Selector Guide PCI 5.0 Volt Tolerant — 5 Volt I/O — Yes Yes Yes — — Yes 3.3 Volt I/O 3,000 2.5 Volt I/O Gates 36 JTAG I/O User I/O C, I SRAM Bits Screening –F, Std, –P Wide Decodes Speed Grade CS49 Flip-Flops/Dedicated Max Package
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CS128
TQ100
eX128
eX256
CS180
A54SX08A
RT54SX72SCQ208
A42MX16
RT54SX32S-CQ208
CQ208
CQ256
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XC95216-20PQG160I
Abstract: XC95216-15PQ160I 471 E25 XC95216 Family XC95216-10PQ160C XC95216-10PQ160I XC95216-15PQG160C XC95216-15PQG160I XC95216-10PQG160I XC9500
Text: XC95216 In-System Programmable CPLD R 5 Note: The 352-pin BGA packages are being discontinued for XC95216 devices. You cannot order these packages after May 14, 2008. Xilinx recommends replacing XC95216 in 352-pin BGA packages with XC95288 devices in 352-pin BGA packages in all designs as soon as possible. Recommended replacements are pin compatible, but
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XC95216
352-pin
XC95288
XCN07010
352-pin
XC95216-20PQG160I
XC95216-15PQ160I
471 E25
XC95216 Family
XC95216-10PQ160C
XC95216-10PQ160I
XC95216-15PQG160C
XC95216-15PQG160I
XC95216-10PQG160I
XC9500
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XC9572XL-PC44
Abstract: XC3195A XC9536XL-CS48 XC9536XLPC44 XC4006E-3TQ144I XC4006E-4PQ160C XC4013XL HT144 XC4003E-PQ100 xc3142a XC3190A-3PQ160I
Text: Discontinue Low-Volume Members of the XC4000XL, XC4000E, XC9500XV, and XC3100A Product Families Product Discontinuance Notice XCN05020 v1.1 March 10, 2006 Overview The purpose of this notice is to discontinue certain low-volume device package-pin combinations of the XC4000E,
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XC4000XL,
XC4000E,
XC9500XV,
XC3100A
XCN05020
XC9500XV
XC9572XL-PC44
XC3195A
XC9536XL-CS48
XC9536XLPC44
XC4006E-3TQ144I
XC4006E-4PQ160C
XC4013XL HT144
XC4003E-PQ100
xc3142a
XC3190A-3PQ160I
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PC84 84-Pin Plastic Leaded Chip Carrier
Abstract: XC95108 XC95108-15PC84C XC95108-15TQ100I XC95108-20TQ100I PC84 XC9500 XC95108-20TQ100C XC95108-7TQ100C
Text: XC95108 In-System Programmable CPLD R DS066 v4.3 March 1, 2004 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates Up to 108 user I/O pins 5V in-system programmable
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XC95108
DS066
36V18
XC9500
PQ160
PC84 84-Pin Plastic Leaded Chip Carrier
XC95108-15PC84C
XC95108-15TQ100I
XC95108-20TQ100I
PC84
XC95108-20TQ100C
XC95108-7TQ100C
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xc95216
Abstract: 352-BALL
Text: XC95216 In-System Programmable CPLD R DS068 v4.2 April 15, 2005 5 Product Specification Features Description • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4,800 usable gates Up to 166 user I/O pins 5V in-system programmable
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XC95216
DS068
36V18
352-BALL
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XC95108
Abstract: XC95108-10PQ160C XC9510815PQ10 XC95108-7TQ100C
Text: XC95108 In-System Programmable CPLD R DS066 v4.3 April 15, 2005 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates Up to 108 user I/O pins 5V in-system programmable
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XC95108
DS066
36V18
XC9500
PQ160
XC95108-10PQ160C
XC9510815PQ10
XC95108-7TQ100C
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VHDL code for generate sound
Abstract: XC3020A - PQ100 xilinx xact viewlogic interface user guide XC7336A XILINX xc2018 foundation field bus XC3000 XC2064A XC5000 XC8100
Text: book : cover 1 Thu Sep 5 09:03:19 1996 R Release Document Xilinx Foundation Series Version 6.0.1 July, 1996 Read This Before Installation book : cover 2 Thu Sep 5 09:03:19 1996 Foundation Series Xilinx Development System book : vcomp.1 iii Thu Sep 5 09:03:19 1996
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Application Notes
Abstract: atmel 830 atmel 432 atmel 936 XCS200 XCS200 FPGA atmel 530 ATMEL 536 XCS10 vq100 xilinx 4000 family
Text: Conversion from Xilinx to Atmel® FPGAs Atmel’s AT40K family is pin compatible with the Xilinx 4000, 5200 and Spartan® families. Atmel’s IDS software can convert XNF designs from Xilinx 3000, 4000 and 5200 families. Atmel can also accept a number of other design formats with
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AT40K
07/00/xM
Application Notes
atmel 830
atmel 432
atmel 936
XCS200
XCS200 FPGA
atmel 530
ATMEL 536
XCS10 vq100
xilinx 4000 family
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XC95144
Abstract: XC95144-10PQ100I PQ100 PQ160 TQ100 XC9500 XC95144-10PQ160I XC95144-15TQ100C
Text: XC95144 In-System Programmable CPLD R DS067 v5.3 February 16, 2004 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 144 macrocells with 3,200 usable gates Up to 133 user I/O pins
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XC95144
DS067
36V18
PQ160
XC95144-10PQ100I
PQ100
TQ100
XC9500
XC95144-10PQ160I
XC95144-15TQ100C
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XC95216-10PQG160C
Abstract: XC95216-10PQG160I XC95216-20PQG160I XC95216-10PQ160I XC95216-15PQ160 XC95216-20PQG160C XC95216 XC95216-15PQ160I
Text: XC95216 In-System Programmable CPLD R DS068 v4.3 April 3, 2006 5 Product Specification Features Description • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4,800 usable gates Up to 166 user I/O pins 5V in-system programmable
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XC95216
DS068
36V18
XC95216-10PQG160C
XC95216-10PQG160I
XC95216-20PQG160I
XC95216-10PQ160I
XC95216-15PQ160
XC95216-20PQG160C
XC95216-15PQ160I
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XC95144-7TQ100C
Abstract: xc95144 XC95144 Family
Text: XC95144 In-System Programmable CPLD R DS067 v5.1 August 21, 2003 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 144 macrocells with 3,200 usable gates Up to 133 user I/O pins 5V in-system programmable
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XC95144
DS067
36V18
XC95144-7TQ100C
XC95144 Family
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XC95108-20TQ100I
Abstract: XC95108 xc95108 tq100 XC95108-15PC84C XC95108-15TQ100I PC84 XC9500 7PQ100I xc95108-7 XC95108-7PQ100C
Text: XC95108 In-System Programmable CPLD R DS066 v4.1 August 21, 2003 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates Up to 108 user I/O pins 5V in-system programmable
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XC95108
DS066
36V18
XC95108-20TQ100I
xc95108 tq100
XC95108-15PC84C
XC95108-15TQ100I
PC84
XC9500
7PQ100I
xc95108-7
XC95108-7PQ100C
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xc95108
Abstract: XC95108-7PC84C
Text: XC95108 In-System Programmable CPLD R DS066 v4.0 June 18, 2003 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates Up to 108 user I/O pins 5V in-system programmable
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XC95108
DS066
36V18
XC95108-7PC84C
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XC95144
Abstract: XC95144 PQG100 XC95144-15PQ160C XC95144-15TQG100I Plastic Quad Flat Pack PQFP XCN11010 XC95144-15PQ100C XC95144-15TQ100C
Text: Product Obsolete/Under Obsolescence XC95144 In-System Programmable CPLD R DS067 v6.0 May 17, 2013 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 144 macrocells with 3,200 usable gates
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XC95144
DS067
36V18
XC95144 PQG100
XC95144-15PQ160C
XC95144-15TQG100I
Plastic Quad Flat Pack PQFP
XCN11010
XC95144-15PQ100C
XC95144-15TQ100C
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netcon
Abstract: XC7354 XC5204PC84 XC3000 XC4000 XC5200 XC7000 DS-344 XILINX XC2000 XC5204-PC84
Text: book : cover 1 Wed Jul 3 10:33:02 1996 R Release Document XACTstep Version 5.2/6.0 Mentor Graphics October 1995 Read This Before Installation book : cover 2 Wed Jul 3 10:33:02 1996 Mentor Graphics Xilinx Development System book : online i Wed Jul 3 10:33:02 1996
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XC95108-15TQ100C
Abstract: XC95108-15PCG84C XC95108 XC95108-20TQ100I XC95108-15TQG100C XC95108-10PQG160I PQ100 PQG160 xc95108 tq100 XC95108-15TQ100I
Text: XC95108 In-System Programmable CPLD R DS066 v4.4 April 3, 2006 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates Up to 108 user I/O pins 5V in-system programmable
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XC95108
DS066
36V18
XC9500
PQ160
XC95108-15TQ100C
XC95108-15PCG84C
XC95108-20TQ100I
XC95108-15TQG100C
XC95108-10PQG160I
PQ100
PQG160
xc95108 tq100
XC95108-15TQ100I
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CQ256
Abstract: CQ208 4PMX 4pm smd
Text: te /e • / Speed Grade JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, - 1 , - 2 , - 3 129 8,000 256 512 - — Yes Yes — — Yes PQ208 Std, - 1 , - 2 , - 3 129 8,000 256 512 — — Yes Yes — — Yes TQ144 Std, - 1 , - 2 , - 3 129 8,000
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A54SX08
VQ100
PQ208
TQ144
TQ176
1P1280A
RP14100A
RT1020
RT1280A
RT1425A
CQ256
CQ208
4PMX
4pm smd
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201 429 HP
Abstract: No abstract text available
Text: f i XILINX XC95180 In-System Programmable CPLD Ju n e 1, 1996 V ersion 1.0 Advance Product Specification Features Description • • The XC95180 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of ten
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XC95180
36V18
PQ160
HQ208
201 429 HP
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