PHL 032 Search Results

74ACT11181

Contextual Info: 74ACT11181 ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR SCAS086 - D32Q0, OCTOBER 1989 - REVISED APRIL 1993 • ■ I ■ I * Inputs Are TTL-Voltage Compatible * New Flow>Through Architecture Optimizes PCB Layout * Center-Pin V ^c and GND Configurations Minimize High-Speed Switching Noise

74F11

Contextual Info: Philips Semlconductors-Slgnetics D ocum ent No. 853-0329 E CN No. 97683 D ate of issue Septem ber 2 0 ,1 9 8 9 Status Product Specification FAST 74F10, 74F11 Gates 74F10 Triple 3-lnput NAND Gate 74F11 Triple 3-lnput AND Gate FAST Products TYPICAL PROPAGATION

74ACT11181

Contextual Info: I 31E D TEXAS INSTR LOGIC • ^(31723 DQflflbS? fi ■ T I I 3 54ACT11181, 74ACT11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS T-MQ-I/-00 TI0183— D3200, OCTO BER 1989—REVISED M AR C H 1990- 54ACT11fS1 . . . JT PACKAGE 74A C T 11181 . . . DW O R NT PACKAGE

74HCT192

Contextual Info: January 1988 Semiconductor MM54HCT192/MM74HCT192 Synchronous Decade Up/Down Counters General Description T hese high speed synchronous counters utilize advanced silicon-gate C M OS te ch n olo gy to achieve th e high noise im ­ m unity and low pow e r consum ption o f C M OS technology,

TSC500

Abstract: 324 EZ 948 BU221 bf063 ST EZ 728 358 ez 802 bfs 417 130 nm CMOS standard cell library ST BF080 bf068
Contextual Info: TSC500 SERIES 1-pm CMOS STANDARD CELLS RELEASE 1.2, APRIL 1989 • High-Performance, 1-pin EPIC CMOS Efficiently Achieves System-Level Designs BOND PAD COMPILER RAM MSI FUNCTION • TSC500 Library Includes Macros for - Static RAMs, Register Files - First-In First-Out Memories

Contextual Info: ‘ÄV * P54/74FCT3157C/D — P54/74FCT3158C/D 3.3 VOLT DATA SELECTOR/MULTIPLEXER EATURES I Function and Drive Compatible with the Fastest TTL Logic I Inputs and Outputs Interface with TTL Logic Levels I 3.3V ± 0.2V Power Supply and CMOS for Lowest Power Dissipation

Contextual Info: P54/74FCT833A/B P54/74PCT833A/B FAST CMOS PARITY BUS TRANSCEIVER - FEATURES • Function, Pinout, and Drive Compatible with the FCT and F Logic

bb 9790 schematic diagram

Abstract: DIGITAL GATE EMULATOR USING 8085 TDA 1006 equivalents ami equivalent gates verilog code motor 04S75 M6845 TDB 2915 KM AMI8G34S AMI8G28S
Contextual Info: Libraiy Characteristics AMERICAN MICROSYSTEMS INC. AMI8G 0.8 micron CMOS Gale Array AMI’s “AMI8Gx” series of 0.8|im gate arrays exploits a proprietary power grid and track routing architecture on a compact, channelless, sea-of-gates design to provide one

information applikation

Abstract: DL193D information applikation mikroelektronik Mikroelektronik Information Applikation mikroelektronik Heft 12 "Mikroelektronik" Heft mikroelektronik applikation VEB mikroelektronik applikation heft DL192D
Contextual Info: [ H n in k ^ t M E le l- c f a n a n il- c Information Applikatiùn Auf ein Wort: Werte Nutzer dieser Applikations-Hefte! Das Tempo der Entwicklung in der Mikroelektronik erfordert, ständig neue Informationen über Bauelemente und ihre mögliche Anwendung

74FCT481

Abstract: 16 bit odd even parity checker using two IC 480B 74PCT480
Contextual Info: 4* P54/74FCT480/A/B P54/74PCT480/A/B P54/74FCT481/A/B (P54/74PCT481 /A/B) DUAL ODD-PARITY, DUAL EVEN-PARITY QENERATOR/CHECKERS_ FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic 64 mA Sink Current (Com'l), 32 mA (Mil)

74als873

Abstract: 202CB J1231
Contextual Info: SN74ALS873B, SN74AS873A, SN54ALS873B, SN54AS873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS 02661, APRIL 1982 - REVISED MAY 1989 > SNS4ALSB73B, S N S 4 A 8 8 7 3 . . . JT PACKAGE S N 74A LS 873B . 8 N 74 A S B 7 3 . . . D W OR NT PACKAGE 3-State Buffer-Type Outputs Drive Bus-Llnas

ST TX01

Contextual Info: SN7SALS085 LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER 03279, APHIL 1989 Compatible with IOS 8802.3:1989 and ANSI/IEEE Std 802.3-1988 Interdevice Loop-Back Paths for System Tasting Squelch Function Implemented on the Receiver Inputs DUAL-IN-LINE PACKAGE

74F10

Abstract: 74F11 n74f10 N74F10D N74F10N N74F11D N74F11N
Contextual Info: Philips Semiconductors-SigneHcs Document No. 853-0329 ECN No. 97683 Date o f issue September 2 0 ,1 98 9 Status Product Specification FAST 74F10, 74F11 Gates 74F10 Triple 3-Input NAND Gate 74F11 Triple 3-Input AND Gate FAST Products TYPE TYPICAL PROPAGATION

434 289

Abstract: 54175 S085 54151 gen 24lJ IPI04LJ NA220 DTB20
Contextual Info: TGC100M MILITARY SERIES 1-/im CMOS GATE ARRAYS Release 2.0, A PR IL 1989 * AC PERFORMANCE TEST STRUCTURE Fully Characterized for M ilitary Applications — Product Fully Compliant w ith the Requirements of M IL -S T D -883 Paragraph 1.2.1 Is Available — Production Processing Is in Accordance

Contextual Info: a F in a l Am2964B Advanced Micro Devices Dynamic Memory Controller DISTINCTIVE CHARACTERISTICS • • • Dynamic Memory Controller for 16K and 64K MOS dynamic RAMs 8 -Bit Refresh Counter for refresh address generation, has clear input and terminal count output

Contextual Info: MOTOROLA MC14562B CMOS LSI 128-BIT STATIC SHIFT REGISTER LOW-POWER C O M P L E M E N T A R Y MO S T h e M C 1 4 5 6 2 8 is a 128-bit static shift register constructed w ith M O S P-channel and N-channel enhancem ent mode devices in a single m onolithic structure. D ata is clocked tn and out o f the shift register

Contextual Info: ICS9112-27 Integrated Circuit Systems, Inc. Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at

Contextual Info: JUN 1 5 1992 P54/74FCT853A/B P54/74PCT853A/B FAST CMOS PARITY BUS TRANSCEIVER FEATURES • Function, Pinout, and Drive Compatible with the FCT and F Logic Inputs and Outputs Interface Directly with TTL, NMOS, and CMOS Devices ■ FCT-B speed at 7.0ns max. (Com'l)

LS249

Contextual Info: General Description The ’LS249 has active HIGH open-collector outputs and in­ corporates the Lamp Test and BI/HBO inputs. Additionally, the ’LS249 will light the top bar segment a for numeral 6 and the bottom bar (segment d) for numeral 9. Connection Diagram

ICS9112AG-27

Abstract: ICS9112-27 ICS9112A
Contextual Info: ICS9112-27 Integrated Circuit Systems, Inc. Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at

Contextual Info: ICS9112-27 Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz.

Contextual Info: ICS9112-27 Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz.

Contextual Info: JU N 1 5 1992 P54/74FCT139/A/C P54/74PCT139/A/C HIGH -SPEED DUAL 1-OF-4 DECO DER 7 $ -

ICS9112A

Contextual Info: ICS9112-27 Integrated Circuit Systems, Inc. Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at