PCI04 Search Results

CL-GD5434

Abstract: cr3c CR3D POS102 cr37
Contextual Info: CL-GD543X/ '4X rCIRRUS LOGIC Alpine Family VGA GUI Accelerators 6. CL-GD543X/ 4X REGISTERS External/General Registers Abbreviation Register Name POS94 POS102 VSSM VSSM MISC MISC FC FC FEAT STAT 3C6 3C7 3C7 3C8 3C9 PCIOO PCI04 PCI04 PCI08 PCI10 PCI14 PC 130

MD-720-3

Abstract: srf 2417 cl-gd7543 HDE 3515 capacitor lsk 561 VGA 20 PIN LCD MONITOR CABLE CONNECTION DIAGRAM MD720-3 CL-PX4072 PC104 pinout LCOS svga
Contextual Info: CL-GD7548 * ’CIRRUS LOGIC9 A d v a n c e H a rd w a re Reference M a n u a l FEATURES • Single-chip XGA/Super VGA LCD controller — Pin-compatible superset of CL-GD7541/7543 SVGA LCD controllers G U I-A ccelerated X G A /S V G A LCD C on troller w ith Low -C ost M ultim edia

Contextual Info: Z8051 Series 8-Bit Microcontrollers Z51F6412 Product Specification PS030302-0212 PRELIMINARY Copyright 2012 Zilog , Inc. All rights reserved. www.zilog.com Z51F6412 Product Specification ii Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS. LIFE SUPPORT POLICY

Contextual Info: Z8051 Series 8-Bit Microcontrollers Z51F0811 Product Specification PS029602-0212 PRELIMINARY Copyright 2012 Zilog , Inc. All rights reserved. www.zilog.com Z51F0811 Product Specification ii Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS. LIFE SUPPORT POLICY

crt controller

Contextual Info: CL-GD7556 Advance Hardware Reference Manual OVERVIEW The CL-GD7556 is the second product in a new family of 64-bit GUI and video-accelerated LCD/CRT controllers. It supports all of the highest operating modes of the CL-GD7555, but it does it at 3.3 V to save operating

CL-GD7543

Abstract: g31 crb register116 sra 433 d1
Contextual Info: CL-GD7541/GD7543 Super VGA LCD Controller CIRRUS LOGIC TABLE OF CONTENTS 1. PIN 1.1 1.2 1.3 1.3.1 1.3.2 1.3.3 1.3.4 1.3.5 1.3.6 2. PIN DESCRIPTIONS. 27

CR37

Abstract: sr8 357
Contextual Info: CL-GD7541/GD7543 Super V G A L C D Controller 6. CIRRUS LOGIC REGISTER SUMMARY The registers in this chapter include standard VGA registers, as well as Extension registers that Cirrus Logic has added. 6.1 Sum m ary of External/General Registers in Chapter 7

CL-GD5480

Abstract: intel 945 crb alpine md53 intel 845 crb schematics 945 MOTHERBOARD CIRCUIT diagram 945 crb INTEL 945 crb schematics vesa GD5480 pitch 0.4 QFP 256p
Contextual Info: CL-GD5480 Advance Data Book FEATURES 64-Bit SGRAM GUI Accelerator • 64-bit high-bandwidth synchronous DRAM interface — 800 Mbytes/sec. peak memory bandwidth — Supports modes up to 1600 x 1200, 64K colors at 60 Hz and 1280 × 1024, 16.8M colors at 75 Hz

Contextual Info: 2 THIS DRAWING IS COPYRIGHT UNPUBLISHED. 20 RELEASED BY TYCO ELECTRONICS CORPORATION FOR ALL 20 PUBLICATION RIGHTS LOC RESERVED. AD D I ST R EV I S IO N S 00 LTR R E V P E R EC 0 G 3 C - 0 I 8 3 - 0 I R E V P E R EC 0 G 3 C - 3 I 3 - 0 4 KEYED DWN DATE DESCRIPTION

vport

Contextual Info: CL-GD7548 X G A ISV G A L C D Controller 'CIRRUS LOGIC Table of Contents 1. PIN INFORMATION. 15 1.1 1.2 1.3 1.3.1 1.3.2 1.3.3 1.3.4 1.3.5 1.3.6 1.3.7

ICE1712

Abstract: ENvY24 via ENvY24 ICE1712 application IC Ensemble ic LK 1628 CCS11 CS8414 5.1 audio ICE1230 MT28 package
Contextual Info: ICE1712 PCI Multi-Channel I/O Controller Preliminary PCI Multi-Channel I/O Controller January 2000 IC Ensemble, Inc. 3970 Freedom Circle Santa Clara, CA 95054-1204 ICE1712 PCI Multi-Channel I/O Controller Preliminary How to contact IC Ensemble, Inc.: sales@icensemble.com

Contextual Info: CL-GD7548 XGAISVGA LCD Controller 7. CIRRUS LOGIC 1 EXTERNAL/GENERAL REGISTERS NOTE: 7.1 T h e '?’ in the I/O port address of the registers in the next sections implies ‘B’ in Monochrome mode and ‘D’ in Color mode. MISC: Miscellaneous Output Register

bitblt raster

Abstract: GR6 434 CR54
Contextual Info: CL-GD7548 XG A/SVG A LCD Controller 6. 1CIRRUS LOGIC REGISTER SUMMARY The registers summarized in this chapter include standard VGA registers, as well as Extension registers that Cirrus Logic has added. 6.1 Summary of External/General Registers in Chapter 7

vt1611a

Abstract: ice1724 Envy24HT ICE1712 ENvY24 via ENvY24 Multi-Channel Serial Audio Interface Diagram vt1611 4.1 home theater ic IC Ensemble
Contextual Info: ICE1724 PCI Multi-Channel Audio Controller Preliminary CONFIDENTIAL PCI Multi-Channel Audio Controller November 2001 IC Ensemble, Inc. a VIA Technologies company Fremont, CA 94539 ICE1724 PCI Multi-Channel Audio Controller Preliminary How to contact VIA Technologies:

CL-GD5434

Abstract: alpine md53 CL-GD5428 gd5434 GD5430 CL-GD5436 945 MOTHERBOARD video diagram CL-GD5430 CL-GD543X p11-b
Contextual Info: CL-GD543XI'4X 'CIRRUS LOGIC8 Preliminary Data Book - FEATURES VGA GUI Accelerators CL-GD543X/’4X Family • ■ CL-GD5440 CL-GD5434/’36 CL-GD5430 Pin- and software-compatible VGA graphics accelerators

CL-GD5446 Technical Reference Manual

Abstract: Cirrus Logic GD5446 CL-PX4072 CL-GD5446 GD5446 alpine md53 gpd12 1995 planar YUV PC BIOS Source code vesa local bus design
Contextual Info: CL-GD5446 Preliminary Data Book FEATURES 64-bit VisualMedia Accelerator • High-throughput PCI bus interface optimized for video playback — Large write buffer allows sustained zero-wait-state bursts — Independent memory apertures for BitBLT and CPU/video

ihp 1c manual

Abstract: Cirrus CL-GD5428 gd5429 CL-GD5428 CL-GD5430 GD543 vl-bus CL-GD5434 CF141 md53
Contextual Info: CL-GD543X rCIRRUS L O C / C Prelim inary D a ta Book FEATURES VGA GUI Accelerators • Pin- and software-compatible VGA graphics accelerator family CL-GD5434 — 64-bit GUI Accelerator CL-GD5430 — 32-bit GUI Accelerator ■ Enhanced GUI acceleration — 64-bit BitBLT bit block transfer engine (CL-GD5434)

Contextual Info: CL-GD543X CIRRUS LOGIC Preliminary Data Book FEATURES VGA GUI Accelerator • Pin- and software-compatible VGA graphics accelerator family CL-GD5434 — 64-bit GUI Accelerator CL-GD5430 — 32-bit GUI Accelerator ■ Enhanced GUI acceleration — 64-bit Bit Block Transfer BitBLT engine (CL-GD5434)

GP014

Abstract: alpine md53 GP011 945 crb 945 MOTHERBOARD CIRCUIT diagram alpine Full Speed B108A cga to vga converter P11B CL-GD5446
Contextual Info: CL-GD5446 'CIRRUS LOGIC Prelim inary D ata Book FEATURES • High-throughput PCI bus interface optimized for video playback — Large write buffer allows sustained zero-wait-state bursts — Independent memory apertures for BitBLT and CPU/video allow concurrent operations for optimized video playback

CL-GD7541

Abstract: MD-720-3 graphical lcd 128X64 with touch screen 128X64 graphical LCD screen cl-gd7543 LD3120 APPLE LCD INVERTER mc1377 application note SiS chipset 486 CL-GD7542 LCD VGA Controller Preliminary Data Boo
Contextual Info: CL-GD7541/GD7543 — CIRRUS LOG/C Preliminary Data Book FEATURES • Single-chip Super VGA LCD controlle r — Pin compatible with CL-GD7542 — IBM® VGA hardware-compatible ■ GUI acceleration GU I-Accelerated SVGA LCD Controller for Portable Computer s

CDM20802

Contextual Info: Z8051 Family of 8-Bit Microcontrollers Z51F6412 Development Kit User Manual UM025901-1112 Copyright 2012 Zilog, Inc. All rights reserved. www.zilog.com Z51F6412 Development Kit User Manual ii Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS. LIFE SUPPORT POLICY

MC95FG208R

Abstract: MC95FG208 MC95FG208D MC95FG308L MC95FG308 MC95FG208M MC95FG208H MC95FG308D MC95FG308U mc95f
Contextual Info: MC95FG308 ABOV SEMICONDUCTOR Co., Ltd. 8-BIT MICROCONTROLLERS MC95FG308 User‟s Manual Ver. 1.2 Oct 30, 2010 Ver. 1.2 1 MC95FG308 REVISION HISTORY VERSION COMMENT DATE 1.2 Update 11.1.5 register description for clock generator 2010/10/30 1.1 Update endurance spec

CDR03 receiver module

Abstract: Zilog 1521 Z51F0811 MC95FG308
Contextual Info: Z8051 Series 8-Bit Microcontrollers Z51F0811 Product Specification PS029602-0212 PRELIMINARY Copyright 2012 Zilog , Inc. All rights reserved. www.zilog.com Z51F0811 Product Specification ii Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS. LIFE SUPPORT POLICY

Contextual Info: 2 THIS DRAWING IS COPYRIGHT UNPUBLISHED. 20 RELEASED BY TYCO ELECTRONICS CORPORATION FOR ALL 20 PUBLICATION RIGHTS LOC RESERVED. AD KEYED D I ST REV I S IONS 00 LTR C I R CU I T S DWN DATE DESCRIPTION APVD R E V P E R EC 0 G 3 C - 0 I 8 3 - 0 I 13 J U N 2 0 0 I