MSOI002B
Abstract: No abstract text available
Text: MECHANICAL DATA MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001 D R-PDSO-G* PLASTIC SMALL-OUTLINE PACKAGE 8 PINS SHOWN 0.020 (0,51) 0.014 (0,35) 0.050 (1,27) 8 0.010 (0,25) 5 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane
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MSOI002B
4040047/E
MSOI002B
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Untitled
Abstract: No abstract text available
Text: TLC225xĆQ1, TLC225xAĆQ1 Advanced LinCMOS RAILĆTOĆRAIL VERY LOWĆPOWER OPERATIONAL AMPLIFIERS ąą SGLS188A − OCTOBER 2003 − REVISED FEBRUARY 2004 D Qualification in Accordance With D D D D D AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control
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TLC225xQ1,
TLC225xAQ1
SGLS188A
AEC-Q100
MIL-STD-883,
TLC2252/52A)
TLC2254/54A)
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Untitled
Abstract: No abstract text available
Text: Data sheet acquired from Harris Semiconductor SCHS097C – Revised July 2003 The CD40106B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, M96,
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SCHS097C
CD40106B
14-lead
MPDI002C
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Untitled
Abstract: No abstract text available
Text: SN74LVC00AĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCAS729 − NOVEMBER 2003 D Controlled Baseline D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing
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SN74LVC00AEP
SCAS729
MIL-STD-883,
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Untitled
Abstract: No abstract text available
Text: SN54LV164A, SN74LV164A 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS SCLS403D – APRIL 1998 – REVISED JANUARY 2001 D D D D SN54LV164A . . . J OR W PACKAGE SN74LV164A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)
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SN54LV164A,
SN74LV164A
SCLS403D
000-V
A114-A)
A115-A)
SN54LV164A
SN74LV164A
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Untitled
Abstract: No abstract text available
Text: SN54LV20A, SN74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV20A . . . J OR W PACKAGE SN74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)
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SN54LV20A,
SN74LV20A
SCES339B
000-V
A114-A)
A115-A)
SN54LV20A
SN74LV20A
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Untitled
Abstract: No abstract text available
Text: SN54LVC04A, SN74LVC04A HEX INVERTERS SCAS281M – JANUARY 1993 – REVISED SEPTEMBER 2002 SN54LVC04A . . . J OR W PACKAGE SN74LVC04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2 13 3 12 4 5 6 7 11 10 9 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 14 1Y 1A NC
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SN54LVC04A,
SN74LVC04A
SCAS281M
000-V
A114-A)
A115-A)
SN74LVC04ARGYR
SN74LVC04A
SCEM008C,
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MC14538
Abstract: No abstract text available
Text: Data sheet acquired from Harris Semiconductor SCHS093B – Revised June 2003 The CD14538B is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B. It can replace the CD4538B which type is not recommended for new
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SCHS093B
CD14538B
MC14538
CD4098B*
CD4538B.
CD4538B
16-lead
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HA595
Abstract: No abstract text available
Text: SN54AHC595, SN74AHC595 8ĆBIT SHIFT REGISTERS WITH 3ĆSTATE OUTPUT REGISTERS SCLS373G − MAY 1997 − REVISED SEPTEMBER 2003 QB QC QD QE QF QG QH GND description/ordering information The ’AHC595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type
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SN54AHC595,
SN74AHC595
SCLS373G
000-V
A114-A)
A115-A)
SN54AHC595
SN74AHC595
AHC595
HA595
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74 HC75, CD74 HCT75 /Subject (Dual 2-Bit Bistabl e CD54/74HC75, CD54/74HCT75 Data sheet acquired from Harris Semiconductor SCHS135D Dual 2-Bit Bistable Transparent Latch March 1998 - Revised January 2003 Features latches. Each one of the 2-bit latches is controlled by
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CD54/74HC75,
CD54/74HCT75
SCHS135D
HCT75
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74 HC4016 /Subject (HighSpeed CMOS Logic Quad Bilat- CD74HC4016 Data sheet acquired from Harris Semiconductor SCHS199B High-Speed CMOS Logic Quad Bilateral Switch February 1998 - Revised October 2003 Features Description • Wide Analog-Input-Voltage Range . . . . . . . . . 0V to 10V
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CD74HC4016
SCHS199B
CD74HC4016
HC4016
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Untitled
Abstract: No abstract text available
Text: [ /Title CD74 HC257 , CD74 HCT25 7 /Subject (High Speed CMOS Logic Quad 2-Input Multiplexer CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Data sheet acquired from Harris Semiconductor SCHS171C November 1997 - Revised July 2003 High-Speed CMOS Logic Quad 2-Input
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CD54HC257,
CD74HC257,
CD54HCT257,
CD74HCT257
SCHS171C
HC257
HCT25
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120-3C
Abstract: No abstract text available
Text: TB5R1 TB5R2 www.ti.com SLLS588 − NOVEMBER 2003 QUAD DIFFERENTIAL PECL RECEIVERS FEATURES D Functional Replacements for the Agere D D D D D D D D D D D D BRF1A, BRF2A, BRS2A, and BRS2B Pin Equivalent to General Trade 26LS32 High Input Impedance Approximately 8 kΩ
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SLLS588
26LS32
50-mV
-125-mV
-405C
MS-013,
120-3C
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Untitled
Abstract: No abstract text available
Text: LP211, LP311 LOWĆPOWER DIFFERENTIAL COMPARATORS WITH STROBES SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003 D Low Power Drain . . . 900 µW Typical With D D D D D D D D D LP211 . . . D PACKAGE LP311 . . . D, P, OR PS PACKAGE TOP VIEW 5-V Supply Operates From ±15 V or From a Single
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LP211,
LP311
SLCS003D
LM211,
LM311
LP311
LP211
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Ma3232c
Abstract: mb3232 mb3232i MA3232 MAX3232 MAX3232CD MAX3232CDB MAX3232CDBR MAX3232CDR MAX3232CDW
Text: MAX3232 3ĆV TO 5.5ĆV MULTICHANNEL RSĆ232 LINE DRIVER/RECEIVER WITH ±15ĆkV ESD PROTECTION SLLS410H − JANUARY 2000 − REVISED NOVEMBER 2003 D RS-232 Bus-Pin ESD Protection Exceeds D D D D D D D D D D D, DB, DW, OR PW PACKAGE TOP VIEW ±15 kV Using Human-Body Model (HBM)
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MAX3232
RS232
SLLS410H
RS-232
TIA/EIA-232-F
SNx5C3232
Ma3232c
mb3232
mb3232i
MA3232
MAX3232
MAX3232CD
MAX3232CDB
MAX3232CDBR
MAX3232CDR
MAX3232CDW
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L2903 TEXAS INSTRUMENTS
Abstract: l393 l2903 l393a TL331 marking lm393 application LM393 data sheet LM193 LM2903 LM2903Q
Text: LM193, LM293, LM293A, LM393 LM393A, LM2903, LM2903Q DUAL DIFFERENTIAL COMPARATORS SLCS005L – JUNE 1976 – REVISED AUGUST 2003 D D D D D D D D D description/ordering information LM193 . . . D OR JG PACKAGE LM293 . . . D OR P PACKAGE LM293A . . . D PACKAGE
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LM193,
LM293,
LM293A,
LM393
LM393A,
LM2903,
LM2903Q
SLCS005L
LM193
LM293
L2903 TEXAS INSTRUMENTS
l393
l2903
l393a
TL331 marking
lm393 application
LM393 data sheet
LM193
LM2903
LM2903Q
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TLV431 VAHC
Abstract: TOP 202 YAI TL1431 TL431 TLV431 TLV431A TLV431AC TLV431CDBVR TY431A
Text: TLV431, TLV431A LOWĆVOLTAGE ADJUSTABLE PRECISION SHUNT REGULATORS SLVS139H− JULY 1996 − REVISED FEBRUARY 2004 D Low-Voltage Operation . . . Down to 1.24 V D 1% Reference-Voltage Tolerance TLV431A D PACKAGE (TOP VIEW) CATHODE ANODE ANODE NC 1 8 2 7 3
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TLV431,
TLV431A
SLVS139H-
TLV431A)
TLV431
TLV431A
TLV431 VAHC
TOP 202 YAI
TL1431
TL431
TLV431AC
TLV431CDBVR
TY431A
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CD54
Abstract: CD54HC4538 CD54HCT4538 CD74HC4538 CD74HCT4538 HC4538
Text: [ /Title CD54 HC453 8, CD74 HC453 8, CD74 HCT45 38 /Subject (High Speed CMOS Logic CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538 Data sheet acquired from Harris Semiconductor SCHS123E June 1998 - Revised October 2003 High-Speed CMOS Logic Dual Retriggerable
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HC453
HCT45
CD54HC4538,
CD74HC4538,
CD54HCT4538,
CD74HCT4538
SCHS123E
HC4538
HCT4538
CD54
CD54HC4538
CD54HCT4538
CD74HC4538
CD74HCT4538
HC4538
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LV08A
Abstract: A115-A C101 SN54LV08A SN74LV08A
Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387I – SEPTEMBER 1997 – REVISED JULY 2003 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 13 4B 2 3 12 4A 4 11 4Y 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE
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SN54LV08A,
SN74LV08A
SCLS387I
SN54LV08A
LV08A
A115-A
C101
SN54LV08A
SN74LV08A
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SN54HC126
Abstract: SN74HC126 SN74HC126D SN74HC126DBR SN74HC126DR SN74HC126N SN74HC126NSR SN74HC126PW SN74HC126PWR
Text: SN54HC126, SN74HC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS103D – MARCH 1984 – REVISED DECEMBER 2002 D D D D D D Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Outputs Interface Directly With System Bus or Can Drive Up To 15 LSTTL Loads
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SN54HC126,
SN74HC126
SCLS103D
SN54HC126
SN54HC126
SN74HC126
SN74HC126D
SN74HC126DBR
SN74HC126DR
SN74HC126N
SN74HC126NSR
SN74HC126PW
SN74HC126PWR
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SN54ALS11A
Abstract: SN54AS11 SN74ALS11A SN74ALS11AD SN74ALS11ADR SN74ALS11AN SN74AS11 SN74AS11D SN74AS11N
Text: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009D – MARCH 1984 – REVISED NOVEMBER 2002 4.5-V to 5.5-V VCC Operation Max tpd of 5.5 ns at 5 V SN54ALS11A, . . . J OR W PACKAGE SN54AS11 . . . J PACKAGE SN74ALS11A, SN74AS11 . . . D, N, OR NS PACKAGE
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SN54ALS11A,
SN54AS11,
SN74ALS11A,
SN74AS11
SDAS009D
SN54AS11
SN54ALS11A
SN54AS11
SN74ALS11A
SN74ALS11AD
SN74ALS11ADR
SN74ALS11AN
SN74AS11
SN74AS11D
SN74AS11N
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lx125
Abstract: A115-A SN74LVT125 SN74LVT125D SN74LVT125DR SN74LVT125NSR
Text: SN74LVT125 3.3-V ABT QUADRUPLE BUS BUFFER WITH 3-STATE OUTPUTS SCBS133E – MAY 1992 – REVISED SEPTEMBER 2002 D D D D D D D Supports Mixed-Mode Signal Operation 5-V Input and Output Voltages With 3.3-V VCC Supports Unregulated Battery Operation Down to 2.7 V
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SN74LVT125
SCBS133E
JESD-17
000-V
A114-A)
A115-A)
lx125
A115-A
SN74LVT125
SN74LVT125D
SN74LVT125DR
SN74LVT125NSR
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A115-A
Abstract: C101 SN54LV06A SN74LV06A LV06A 74LV06
Text: SN54LV06A, SN74LV06A HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS SCES336E – MAY 2000 – REVISED OCTOBER 2002 D D D D D SN54LV06A . . . J OR W PACKAGE SN74LV06A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 6.5 ns at 5 V
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SN54LV06A,
SN74LV06A
SCES336E
SN54LV06A
000-V
A114-A)
A115-A)
A115-A
C101
SN54LV06A
SN74LV06A
LV06A
74LV06
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HC02
Abstract: SN54HC02 SN74HC02 SN74HC02D SN74HC02DBR SN74HC02DR SN74HC02N SN74HC02NSR SN74HC02PW
Text: SN54HC02, SN74HC02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS076D – DECEMBER 1982 – REVISED DECEMBER 2002 D D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-µA Max ICC Typical tpd = 8 ns
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SN54HC02,
SN74HC02
SCLS076D
SN54HC02
HC02
SN54HC02
SN74HC02
SN74HC02D
SN74HC02DBR
SN74HC02DR
SN74HC02N
SN74HC02NSR
SN74HC02PW
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