Untitled
Abstract: No abstract text available
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable DATA BRIEFING ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 1.0µA (max) OPERATION VOLTAGE: 5V ±10% 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns LOW VCC DATA RETENTION: 2V
|
Original
|
PDF
|
M68Z128
128Kb
M68Z128
B68Z128/811
AI00647
AI00657
|
Untitled
Abstract: No abstract text available
Text: M68Z128W 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • LOW VOLTAGE: 3.0V (+0.6V / –0.3V) ■ 128Kb x 8 LOW POWER SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 70ns ■ LOW VCC DATA RETENTION: 1.4V ■ TRI-STATE COMMON I/O ■ LOW ACTIVE and STANDBY POWER
|
Original
|
PDF
|
M68Z128W
128Kb
M68Z128W
|
TSOP 903
Abstract: TSOP32 TSOP32 Package M68Z128 128Kbx8
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable DATA BRIEFING ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 2.0µA (max) OPERATION VOLTAGE: 5V ±10% 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns LOW VCC DATA RETENTION: 2V
|
Original
|
PDF
|
M68Z128
128Kb
M68Z128
B68Z128/903
AI00647
AI00657
TSOP 903
TSOP32
TSOP32 Package
128Kbx8
|
TSOP32
Abstract: M68Z128
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable PRELIMINARY DATA ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 2.0µA (max) OPERATION VOLTAGE: 5V ±10% 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns
|
Original
|
PDF
|
M68Z128
128Kb
TSOP32
M68Z128
TSOP32
|
M68Z128W
Abstract: TSOP32 TSOP32 Package
Text: M68Z128W 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • LOW VOLTAGE: 3.0V (+0.6V / –0.3V) ■ 128Kb x 8 LOW POWER SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 70ns ■ LOW VCC DATA RETENTION: 1.4V ■ TRI-STATE COMMON I/O ■ LOW ACTIVE and STANDBY POWER
|
Original
|
PDF
|
M68Z128W
128Kb
M68Z128W
TSOP32
TSOP32 Package
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 2.0µA (max) ■ OPERATION VOLTAGE: 5V ±10% ■ 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns
|
Original
|
PDF
|
M68Z128
128Kb
TSOP32
M68Z128
TSOP32
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 2.0µA (max) ■ OPERATION VOLTAGE: 5V ±10% ■ 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns
|
Original
|
PDF
|
M68Z128
128Kb
TSOP32
M68Z128
TSOP32
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable PRELIMINARY DATA ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 1.0µA (max) OPERATION VOLTAGE: 5V ±10% 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns
|
Original
|
PDF
|
M68Z128
128Kb
M68Z128
TSOP32
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128 Kbit x 8 Low Power SRAM with Output Enable FEATURES SUMMARY • ULTRA LOW DATA RETENTION CURRENT Figure 1. Package – 10nA (typical) – 2.0µA (max) ■ OPERATION VOLTAGE: 5.0V ± 10% ■ 128 Kbit x 8 VERY FAST SRAM WITH OUTPUT ENABLE
|
Original
|
PDF
|
M68Z128
TSOP32
M68Z128
TSOP32
|
M68Z128
Abstract: M68Z128W TSOP32 3VE1
Text: M68Z128W 3V, 1 Mbit 128 Kbit x 8 Low Power SRAM with Output Enable FEATURES SUMMARY • ULTRA LOW DATA RETENTION CURRENT Figure 1. Package – 10nA (typical) – 2.0µA (max) ■ OPERATION VOLTAGE: 3.0V (+0.6 / –0.3V) ■ 128 Kbit x 8 SRAM WITH OUTPUT ENABLE
|
Original
|
PDF
|
M68Z128W
TSOP32
M68Z128
M68Z128W
TSOP32
3VE1
|
Untitled
Abstract: No abstract text available
Text: M68Z128W 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • LOW VOLTAGE: 3.0V (+0.6V / –0.3V) ■ 128Kb x 8 LOW POWER SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 70ns ■ LOW VCC DATA RETENTION: 1.4V ■ TRI-STATE COMMON I/O ■ LOW ACTIVE and STANDBY POWER
|
Original
|
PDF
|
M68Z128W
128Kb
TSOP32
M68Z128W
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 2.0µA (max) ■ OPERATION VOLTAGE: 5V ±10% ■ 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns
|
Original
|
PDF
|
M68Z128
128Kb
TSOP32
M68Z128
TSOP32
|
Untitled
Abstract: No abstract text available
Text: M68Z128W 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • LOW VOLTAGE: 3.0V (+0.6V / –0.3V) ■ 128Kb x 8 LOW POWER SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 70ns ■ LOW VCC DATA RETENTION: 1.4V ■ TRI-STATE COMMON I/O ■ LOW ACTIVE and STANDBY POWER
|
Original
|
PDF
|
M68Z128W
128Kb
TSOP32
M68Z128W
|
Untitled
Abstract: No abstract text available
Text: M68Z128W 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • LOW VOLTAGE: 3.0V (+0.6V / –0.3V) ■ 128Kb x 8 LOW POWER SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 70ns ■ LOW VCC DATA RETENTION: 1.4V ■ TRI-STATE COMMON I/O ■ LOW ACTIVE and STANDBY POWER
|
Original
|
PDF
|
M68Z128W
128Kb
M68Z128W
|
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable PRELIMINARY DATA ULTRA LOW DATA RETENTION CURRENT – 10nA (typical) – 2.0µA (max) OPERATION VOLTAGE: 5V ±10% 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns
|
Original
|
PDF
|
M68Z128
128Kb
M68Z128
TSOP32
|
M68Z128Y
Abstract: Lithium Battery
Text: M41ST85Y M41ST85W 512 bit 64b x 8 Serial Access RTC and NVRAM SUPERVISOR PRELIMINARY DATA • 3V OR 5V OPERATING VOLTAGE ■ SERIAL INTERFACE SUPPORTS I2C BUS (400 KHz) ■ NVRAMSUPERVISORfor EXTERNAL LPSRAM ■ OPTIMIZED for MINIMAL INTERCONNECT to MCU
|
Original
|
PDF
|
M41ST85Y
M41ST85W
M41ST85Y:
M41ST85W:
SOH28
M68Z128Y
Lithium Battery
|
ABE smd
Abstract: No abstract text available
Text: M41ST85Y M41ST85W 5V or 3V, 512 Kbit 64 bit x 8 SERIAL ACCESS RTC and NVRAM SUPERVISOR PRELIMINARY DATA FEATURES SUMMARY • 5V OR 3V OPERATING VOLTAGE SUPPORTS I2C Figure 1. 28-pin SOIC Package ■ SERIAL INTERFACE (400 KHz) ■ NVRAM SUPERVISOR FOR EXTERNAL
|
Original
|
PDF
|
M41ST85Y
M41ST85W
28-pin
M41ST85Y:
M41ST85W:
ABE smd
|
ABE 027
Abstract: 44-PIN M48T129V M48T129Y SOH44 TSOP32
Text: M48T129Y M48T129V 5.0 or 3.3V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM FEATURES SUMMARY • INTEGRATED, ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT, BATTERY, and CRYSTAL ■ YEAR 2000 COMPLIANT ■ BCD CODED CENTURY, YEAR, MONTH, DAY, DATE, HOURS, MINUTES, and
|
Original
|
PDF
|
M48T129Y
M48T129V
M48T129Y:
M48T129V:
32-pin
ABE 027
44-PIN
M48T129V
M48T129Y
SOH44
TSOP32
|
M40SZ100W
Abstract: M40SZ100Y SOH28 SOIC16 SOIC28
Text: M40SZ100Y M40SZ100W NVRAM SUPERVISOR for LPSRAM PRELIMINARY DATA FEATURES SUMMARY • CONVERT LOW POWER SRAMs INTO NVRAMs ■ 3V OR 5V OPERATING VOLTAGE ■ PRECISION POWER MONITORING and POWER SWITCHING CIRCUITRY ■ AUTOMATIC WRITE-PROTECTION WHEN VCC is OUT-OF-TOLERANCE
|
Original
|
PDF
|
M40SZ100Y
M40SZ100W
M40SZ100Y:
M40SZ100W:
28LEAD
M40SZ100W
M40SZ100Y
SOH28
SOIC16
SOIC28
|
TSOP32 FOOTPRINT
Abstract: NVRAM 1KB SOH28 PCB FOOTPRINT M41T81 m48t35 M48T86 M48Z128 M48Z128V M48Z128Y M48Z129V
Text: Non-Volatile RAMs KEEP TIME, PROTECT DATA NVRAM products offer fast non-volatile memory solutions up to 16 Mbit density using battery backed SRAM, in both surface mount and through-hole packages. Integrated features include battery and crystal, real time clock, watchdog timer, power-on reset, square wave
|
Original
|
PDF
|
NL-5652
FLNVRAM/1000
TSOP32 FOOTPRINT
NVRAM 1KB
SOH28 PCB FOOTPRINT
M41T81
m48t35
M48T86
M48Z128
M48Z128V
M48Z128Y
M48Z129V
|
Untitled
Abstract: No abstract text available
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable PRELIMINARY DATA • ULTRA LOW DATA RETENTION CURRENT - 10nA (typical) - 2.0 mA (max) ■ OPERATION VOLTAGE: 5V ±10% ■ 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns
|
OCR Scan
|
PDF
|
M68Z128
128Kb
M68Z128
TSOP32
|
A141
Abstract: A151 A161 M68Z128W TSOP32
Text: 5 7 . M68Z128W 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable • LOW VOLTAGE: 3.0V (+0.6V / -0.3V ) ■ 128Kb x 8 LOW POWER SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 70ns ■ LOW V Cc DATA RETENTION: 1,4V ■ TRI-STATE COMMON I/O
|
OCR Scan
|
PDF
|
M68Z128W
128Kb
M68Z128W
TSOP32
A141
A151
A161
|
Untitled
Abstract: No abstract text available
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable PRELIMINARY DATA • ULTRA LOW DATA RETENTION CURRENT - 10nA (typical) - 1.0nA(max) ■ OPERATION VOLTAGE: 5V ±10% ■ 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns
|
OCR Scan
|
PDF
|
M68Z128
128Kb
M68Z128
TSOP32
|
M68Z128
Abstract: TSOP32
Text: M68Z128 5V, 1 Mbit 128Kb x8 Low Power SRAM with O utput Enable P R E L IM IN A R Y DATA • ULTRA LOW DATA RETENTION CURRENT - 10nA (typical) - 1 .OfiA (max) ■ OPERATION VOLTAGE: 5V ±10% ■ 128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 55ns
|
OCR Scan
|
PDF
|
M68Z128
128Kb
M68Z128
TSOP32
|