M66251L Search Results

Contextual Info: MITSUBISHI DIGITAL ASSP M66251L 5120 x 8-BIT LINE MEMORY (FIFO) DESCRIPTION The M66251L is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word x 8-bit configuration which uses high-performance silicon gate CMOS process technology.

m66251

Abstract: m66251l
Contextual Info: MITSUBISHI DIGITAL ASSP M66251L 5120 x 8-BIT LINE MEMORY (FIFO) DESCRIPTION The M66251L is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word x 8-bit configuration which uses high-perform ance silicon gate CMOS process technology.

M66253FP

Contextual Info: bSH^öES 0024b30 433 BSHIT1 5K BYTE X 2 FIFO MEMORY I SEMICONDUCTOR TWO BUILT-IN 5K BYTE FIFO MEMORY CIRCUITS HIGH-SPEED FIFO MEMORY SUITABLE FOR DIGITAL PLAIN-M PER COPIERS Ne w s M66253FP The M 66253FP is designed to operate at higher speeds than the conventional