E1 to fiber optic converter circuit
Abstract: stm-1 nortel BTS ericsson LP-UNEQ ERICSSON BTS product LP-UNEQ STM-1 HDB3 and CMI which is better Ericsson Base Station G-783 vc-4 digital cross connect
Text: LXT6051/LXT6251 SDH Chipset SDH and ITU Standards Application Note January 2001 Order Number: 249311-001 As of January 15, 2001, this document replaces the Level One document known as AN9801. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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LXT6051/LXT6251
AN9801.
LXT6251As
E1 to fiber optic converter circuit
stm-1 nortel
BTS ericsson
LP-UNEQ
ERICSSON BTS product
LP-UNEQ STM-1
HDB3 and CMI which is better
Ericsson Base Station
G-783
vc-4 digital cross connect
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dtc12
Abstract: No abstract text available
Text: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E l PDH signals into SDH. The PDH side interfaces with E l LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard
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LXT6251
LXT6251
LXT6051
VC-12
dtc12
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TUG-3
Abstract: LXT6251 6051 LXT6051 AN9906
Text: TUPP to LXT6251/6051 Adaptation in ADM Mode Application Note January 2001 Order Number: 249310-001 As of January 15, 2001, this document replaces the Level One document known as AN9906. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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LXT6251/6051
AN9906.
LXT6251
SXT6051
44MHz
TUG-3
LXT6251
6051
LXT6051
AN9906
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X1HB
Abstract: MTC13 LXT625 131-G W J 50
Text: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper LXT General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard
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LXT6251
VC-12
VC-12s,
PDS-6251-8/99-2
X1HB
MTC13
LXT625
131-G W J 50
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LXT6282
Abstract: JP15 adpll intel pdh e2 74AC04 motorola LXT6251A quad 74HC04 NOT GATE datasheet STM-1 JP16 LXT334
Text: LDB6x51 Evaluation Board for LXT6051, LXT6251A, and LXT6282 Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LDB6x51 Evaluation Board for LXT6051, LXT6251, and LXT6282 User Guide. Order Number: 249305-001
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LDB6x51
LXT6051,
LXT6251A,
LXT6282
LXT6251,
LXT6282
LXT334QFP
LXT6251A
JP15
adpll
intel pdh e2
74AC04 motorola
LXT6251A
quad 74HC04 NOT GATE datasheet
STM-1
JP16
LXT334
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X1HB
Abstract: telecom bus DM9000 application Digital Alarm Clock by using ttl LXT6251A 001H LXT6051 MTD10 LXT6282 MTC11
Text: LXT6251A 21 E1 SDH Mapper Datasheet The LXT6251A 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom bus interface. Further processing by the companion
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LXT6251A
LXT6251A
LXT6051
X1HB
telecom bus
DM9000 application
Digital Alarm Clock by using ttl
001H
MTD10
LXT6282
MTC11
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LXT6251A
Abstract: LXT6051 LXT6234 LXT6282 muldex G703 LXT380 TU12 6251A LXT625
Text: product brief Intel LXT6282 Digital Interface Product Description The Intel® LXT6282 digital interface is the telecommunication industry’s first octal E1 digital interface. It is the only solution to simultaneously address the widespread problems of jitter, wander,
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LXT6282
USA/1100/1K/MG/DC
LXT6251A
LXT6051
LXT6234
muldex
G703
LXT380
TU12
6251A
LXT625
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Untitled
Abstract: No abstract text available
Text: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-170 SDH Overhead Terminator General Description The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides
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LXT6051
STM-170
LXT6051
51Mb/s)
155Mb/s)
LXT6251
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PDF
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40-pin male connector
Abstract: AMCC errata LXT6251A LXT6282 40 pin connector 40 PIN MALE CONNECTOR BNC connector led optical transceiver datasheet STM 1 STM-1 LXT334
Text: LDB6111 STM-1 Optical Board for use with the LDB6x51A Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LDB6111 STM-1 Optical Board for use with the LDB6x51A User Guide. Order Number: 249308-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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LDB6111
LDB6x51A
LDB6x51A
LDB6x51
LXT6282
LXT6251A
LXT6051
LXT334
S3032
40-pin male connector
AMCC errata
LXT6251A
LXT6282
40 pin connector
40 PIN MALE CONNECTOR
BNC connector led
optical transceiver datasheet STM 1
STM-1
LXT334
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ABBA
Abstract: LXT6051QE 9922H AU-AIS LXT6051 VC12 SLXT6051 LXT6251 W117
Text: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-1/0 SDH Overhead Terminator General Description Features The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0
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LXT6051
LXT6051
51Mb/s)
155Mb/s)
LXT6251
ABBA
LXT6051QE
9922H
AU-AIS
VC12
SLXT6051
LXT6251
W117
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LXT6234
Abstract: LXT6282 E1 HDB3
Text: Data Sheet MARCH 1999 Revision 2.0 LXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features LXT6282 is an eight-channel E1 digital interface. It integrates an E1 dejitter phase locked loop, an E1 retiming
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LXT6282
LXT6282
SXT6251
PDS-6282-R1
LXT6234
E1 HDB3
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IXF6151
Abstract: oasis GR-253-CORE LXT6051 TU12 G841 ANSI T1.105
Text: IXF6151 — 28 T1/E1 Universal Mapper Frequently Asked Questions January 2001 Order Number: 249392-001 As of January 15, 2001, this document replaces the Level One document known as IXF6151 - FAQs. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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IXF6151
IXF6151.
oasis
GR-253-CORE
LXT6051
TU12
G841
ANSI T1.105
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Untitled
Abstract: No abstract text available
Text: Data Sheet LXT6282 MARCH 1999 Revision 2.0 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features LXT6282 is an eight-channel E l digital interface. It inte grates an E l dejitter phase locked loop, an E l retiming
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LXT6282
LXT6282
SXT6251
SXT6282LE.
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LXT6282
Abstract: DTD17 MTC11 MTC15 header 3x2 LXT6251A intel C96 74HC04 LXT344 25X2
Text: POWER.SCH POWER SUPPLIES MHICLK MHICLK J3 EXTCLKA EXTCLKA MHBCLK MHBCLK BNC-4 LXT6051.SCH J4 EXTCLKB MRESET EXTCLKB ALTSOH.sch BNC-4 MRESET MRESET J5 EXTCLKC MRESET EXTCLKC TSYNCCLKM TSYNCCLKM BNC-4 FPGA FOR SERIAL ACCESS TSYNCCLKM LXT6051A ORDERWIR.SCH TROWM
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LXT6051
LXT6051A
LDB6X51A
21-Dec-2000
LXT6282
DTD17
MTC11
MTC15
header 3x2
LXT6251A
intel C96
74HC04
LXT344
25X2
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AU-AIS
Abstract: Digital Alarm Clock by using ttl LXT e2 LXT6251A marking cod A2 regenerator in optical D4D12 LXT6051 LXT6051QE SSI 7200
Text: LXT6051 STM-1/0 SDH Overhead Terminator Datasheet The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides micro-controller access for performance monitoring,
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LXT6051
LXT6051
51Mb/s)
155Mb/s)
LXT6251A
AU-AIS
Digital Alarm Clock by using ttl
LXT e2
LXT6251A
marking cod A2
regenerator in optical
D4D12
LXT6051QE
SSI 7200
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