LVQ74 Search Results

LVQ74

Contextual Info: b4E ]> m bSGllES ÜQ7b3ö‘i Sbb « N S C 1 LVQ74 54LVQ/LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Asynchronous Inputs: LOW input to S o Set sets Q to HIGH level LO W input to (3d (Clear) sets Q to LOW level Clear and Set are independent of clock

74LVQ74

Abstract: 74LVQ74SC 74LVQ74SCX 74LVQ74SJ 74LVQ74SJX M14A M14D
Contextual Info: r~O > National Semiconductor LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, <3 outputs. Information at the input is transferred to the outputs on the

LVQ74

Abstract: 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D
Contextual Info: Revised June 2001 LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

LVQ74

Contextual Info: LVQ74 Eg National ÆM Semiconductor 54LVQ/LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Asynchronous Inputs: LOW input to 3 d Set sets Q to HIGH level LOW input to C q (Clear) sets Q to LOW level Clear and Set are independent of clock

113003

Abstract: 74LVQ74 74LVQ74SC 74LVQ74SJ M14A M14D
Contextual Info: LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

Contextual Info: E M IC O N D U C T Q R r LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. In­ formation at the input is transferred to the outputs on the

74LVQ74

Abstract: 74LVQ74SC 74LVQ74SCX 74LVQ74SJ 74LVQ74SJX M14A M14D 11347
Contextual Info: LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q Q outputs Information at the input is transferred to the outputs on the

LVQ74

Contextual Info: LVQ74 National Semiconductor LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inpLts and complementary Q, Ü outputs. Information at the Input is transferred to the outputs on the

74LVQ74

Abstract: 74LVQ74M 74LVQ74T TSSOP14
Contextual Info: LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V

Contextual Info: S E M IC O N D U C T O R L o w Voltage Dual D -Type Positive E d g e-T rig g e re d LOW input to CD Clear sets Q to LOW level General Description HIGH F eat ur es • Ideal tor low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and

LVX273

Abstract: LCX08 LVX123 LVX541 LVX244 LCX04 st thomson guide LCX74 LCX32 LVX374
Contextual Info: SELECTION GUIDE LCX FAMILY Function BUFFER Standard Code NAND LCXOO NOR LCX02 AND LCX08 OR LCX32 E X OR LCX86 LCX04, LCX 14 INVERTER BUFFER FLIP-FLOP LATCH 3-STATE LCX 125, LCX240, LCX244, L C X 16240, LCX16240A, L C X 16244, LCX16244A BIDIRECTIONAL LCX245, LCX646, LCX652,

18LV

Abstract: 74xx74 74xx163 74xx00
Contextual Info: LVQ Descriptions and Family Characteristics In 1985, a family of high speed advanced CMOS circuits was introduced. FACT Fairchild Advanced CMOS Tech­ nology Logic offered a combination of high speed, low pow­ er dissipation, high noise immunity, wide fanout capability,

74LVQ74

Contextual Info: r Ä z 7 T # S G S -T H O M S O N R L iS M K S 7 4 L V Q 74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • HIGHSPEED: fMAX = 250 MHz TYP. at Vcc =3.3V . COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 jiA (MAX.) at T a = 25 °C . LOW NOISE:

74LVQ74

Contextual Info: LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR . HIGHSPEED: fM A X = 250 MHz TYP. at Vcc =3.3V . COMPATIBLE WITH TTL OUTPUTS • LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.2 V (TYP.) at V c c = 3.3V . 75Q TRANSMISSION LINE DRIVING

74LVQ74

Abstract: LVQ74 74LVQ74M 74LVQ74T TSSOP14
Contextual Info: LVQ74  DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V

74LVQ74

Contextual Info: r r z S C S -T H O M S O N ^ 7# 7 4 L V Q 74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR . . HIGHSPEED: 250 MHz TYP. at Vcc = 3.3V COMPATIBLE WITHTTL OUTPUTS LOW POWER DISSIPATION: Icc = 2 nA (MAX.) at Ta = 25 °C LOW NOISE: Volp = 0.2 V (TYP.) at Vcc = 3.3V

74LVX 244 D

Contextual Info: 1-1 T C 7 4 L V Q /LV X Product Guide TC 74LVQ Series Type No. TC 74LVQ TC74LVQ TC74LVQ TC74LVQ Function Pin Page 00 F / F N / F S 02 F / F N / F S Q U A D 2-INPUT N A N D GATE Q U A D 2-INPUT N O R G ATE 14 14 04 F / FN /F S 08 F / FN /F S 14 F / FN /F S

lcx74

Abstract: 74LCX 241FF lcx16373A
Contextual Info: 1-1 TC74LCX / LVQ / LVX Product Guide TC 74LCX Series TC 74LCX Type No. 00 F/ F N / F S 02 F/ FN /F S 04 F/ FN /F S 08 F/ F N / F S 32 F / F N / F S TC 74LCX TC 74LCX TC74LCX TC74LCX Function N A N D G ATE N O R GATE A N D GATE O R GATE Pin 14 Page 103 14

74LVQ74

Abstract: TSSOP14 74LVQ74M 74LVQ74T
Contextual Info: LVQ74  DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V

HC165A

Abstract: TC9525F VHC165 TC9534N HC4050A HC4520A TC8215uf HC4049A TC24SC HCT164A
Contextual Info: MOS Industrial ICs AD Converter - je Conversion Resolution Time Type No. Conversion Mode Input Channel TC5090AP 8b it 2ms Integration method 1 TC5091AP Bbit 2ms " 6 TC5092AP 13bit 8.2ms ’ 8 TC5093AP 8b it 50ps Successive approximation 8 Output Formst

74LVQ74

Contextual Info: LVQ74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 250 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V

74LVQ74

Abstract: KHN 10 74LVQ74M 74LVQ74T TSSOP14
Contextual Info: = 7 SGS-THOMSON k 7# R f f l D i S ^ l l l L [ l e T n ^ D S ! l D © S LVQ74 DUAL D-TYPE FLIP FLOP W ITH PR ESET AND CLEAR . . HIGHSPEED: =250 MHz (TYP. at Vcc =3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: Ic e = 2 |xA (MAX.) at T A = 25 °C