LPR520PC25 Search Results

Contextual Info: LPR520/521 LPR520/521 DEVICES INCORPORATED 4 x 16-bit Multilevel Pipeline Register 4 x 16-bit Multilevel Pipeline Register DEVICES INCORPORATED FEATURES DESCRIPTION ❑ Four 16-bit Registers ❑ Implements Double 2-Stage Pipeline or Single 4-Stage Pipeline

Contextual Info: LPR520/521 ht vu t -, iNi u h K jh a ii h FEATURES DESCRIPTION □ Fou r 16-bit R egisters □ Im plem ents D ouble 2-Stage Pipe­ line or Sin g le 4-Stage P ipeline Register □ H old, Shift, and Load Instructions □ Separate D ata In and Data O ut Pins

L29C520

Abstract: LPR520 LPR520JC25 LPR520PC15 LPR520PC22 LPR520PC25 y10 smd
Contextual Info: LPR520 LPR520 DEVICES INCORPORATED 4 x 16-bit Multilevel Pipeline Register 4 x 16-bit Multilevel Pipeline Register DEVICES INCORPORATED FEATURES DESCRIPTION ❑ Four 16-bit Registers ❑ Implements Double 2-Stage Pipeline or Single 4-Stage Pipeline Register

AM29520

Abstract: LPR520DC d1439 LPR521 LPR520 KMB24 kme-3 KME3
Contextual Info: LPR520/521 Multilevel Pipeline Register Features Description □ Four 16-bit registers The Logic Devices LPR520 and LPR521 are functionally compatible with the Advanced Micro Devices AM29520 and AM29521 but are 16 bits wide. They are implemented in low power CMOS.

Contextual Info: LPR520 4 x 16-bit M u ltile vel P ip e lin e R e g is te r □ Four 10 -bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register □ Hold, Shift, and Load Instructions □ Separate Data In and Data Out Pins □ High-Speed, Low Power CMOS

y10 smd

Abstract: PR521
Contextual Info: LPR520/521 4 x 16-bit Multilevel Pipeline Register Üfc.VlO t-S IN C O R P O R A I L U DESCRIPTION FEATURES □ Four 16-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register □ Hold, Shift, and Load Instructions □ Separate Data In and Data Out Pins

Contextual Info: LPR520/521 4 x 16-bit Multilevel Pipeline Register DESCRIPTION FEATURES □ Four 16-bit R egisters □ Im plem ents D ouble 2-Stage Pipe­ line or Single 4-Stage Pipeline Register □ H old, Shift, and L oad Instructions □ Separate D ata In an d D ata O ut Pins

Contextual Info: LPR520/521 4 x 16-bit Multilevel Pipeline Register V IC I S INCORPORA ILL DESCRIPTION FEATURES □ Four 16-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register □ Hold, Shift, and Load Instructions □ Separate Data In and Data Out Pins

CONTACTOR

Abstract: clock u150
Contextual Info: LPR520/521 V IO L S IN C O R P O R A I h ' FEATURES □ Four 16-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register □ Hold, Shift, and Load Instructions □ Separate Data In and Data Out Pins □ High-Speed, Low Power CMOS

Contextual Info: LPR520 4 x 16-bit Multilevel Pipeline Register FEATURES DESCRIPTION □ Four 16-bit Registers The LPR520 is functionally compatible with the L29C520 but have 16-bit inputs and outputs. The LPR520 is implemented in low power CMOS. □ Implements Double 2-Stage Pipe­

L1823

Abstract: DI437 smd diode Y5
Contextual Info: L Q G / C L P R 5 2 0 4 x 16-bit Multilevel Pipeline Register DRVICES INCORPORATED FEATURES_j □ Four 16-bit Registers □ Im plem ents Double 2-Stage Pipe­ line or Single 4-Stage Pipeline •Register □ H old, Shift, and Load Instructions