LNI8010
Abstract: LNI7020 74ALVT16652 ssv 620
Text: LNI8010 Network Database Co-Processor Version 1.01 PRELIMINARY This document describes the Lara Networks, Inc. Lara LNI8010 Network Database Co-Processor. Until a newer version is published, it is the official reference source for all revisions and/or releases of this product. The on-line copy of this document will
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LNI8010
LNI8010
LNI7020
74ALVT16652
ssv 620
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TCAM netlogic
Abstract: netlogic tcam NetLogic tcam tcam cypress NetLogic Microsystems cypress tcam network search engine netlogic NetLogic npu Netlogic bga
Text: A H i gh -D en sity M A C a nd CI D R Ta ble P ro cess or iFlow Address Processor Product Brief iFlow Address Processor www.siliconaccess.com DESCRIPTION As network data rates have increased to 10 gigabits per second and higher, performance demands on the
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520-pin
TCAM netlogic
netlogic tcam
NetLogic
tcam
tcam cypress
NetLogic Microsystems
cypress tcam
network search engine netlogic
NetLogic npu
Netlogic bga
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AN1338
Abstract: 496k M7010 M7010R M7010R-083ZA1
Text: M7010 16K x 68-bit Entry NETWORK SEARCH ENGINE FEATURES SUMMARY • 16K ENTRIES IN 68-BIT MODE ■ ■ Figure 1. 272-ball PBGA Package TABLE MAY BE PARTITIONED INTO UP TO FOUR 4 QUADRANTS (Data entry width in each quadrant is configurable as 34, 68, 136, or 272 bits.)
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M7010
68-bit
272-ball
136-BIT
34-BIT
272-BIT
AN1338
496k
M7010
M7010R
M7010R-083ZA1
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496k
Abstract: Non-Pipelined AN1342 M7020 RFC8261 STM7020
Text: AN1342 APPLICATION NOTE Implementing Address Resolution Using M70X0 Network Search Engine Technology in Multi-Gigabit IP Network Interfaces INTRODUCTION Address Resolution Protocol ARP ARP is the standard protocol in IP networks for the conversion of Media Access Control (MAC) addresses
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AN1342
M70X0
RFC8261.
496k
Non-Pipelined
AN1342
M7020
RFC8261
STM7020
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M7010
Abstract: M7010R-066ZA1 M7010R-083ZA1
Text: M7010 16 Kbit x 68 bit Entry Network Search Engine DATA BRIEFING FEATURES SUMMARY • 16K DATA ENTRIES IN 68-BIT MODE ■ ■ Figure 1. Package TABLE MAY BE PARTITIONED INTO UP TO FOUR 4 QUADRANTS (Data entry width in each quadrant is configurable as 34, 68, 136, or 272 bits.)
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M7010
68-BIT
136-BIT
34-BIT
272-BIT
272-count,
M7010
M7010R-066ZA1
M7010R-083ZA1
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LHO1
Abstract: M7020 M7020R-050ZA1 M7020R-066ZA1 phsl lho0
Text: M7020 32 Kbit x 68 bit Entry Network Search Engine DATA BRIEFING FEATURES SUMMARY • 32K ENTRIES IN 68-BIT MODE ■ ■ Figure 1. Package TABLE MAY BE PARTITIONED INTO UP TO FOUR 4 QUADRANTS (Data entry width in each quadrant is configurable as 34, 68, 136, or 272 bits.)
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M7020
68-BIT
136-BIT
34-BIT
272-BIT
1984K
AI04271
272-count,
LHO1
M7020
M7020R-050ZA1
M7020R-066ZA1
phsl
lho0
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M7010
Abstract: M7010R-066ZA1 M7010R-083ZA1
Text: M7010 16K x 68-bit Entry NETWORK SEARCH ENGINE DATA BRIEFING FEATURES SUMMARY • 16K ENTRIES IN 68-BIT MODE ■ ■ TABLE MAY BE PARTITIONED INTO UP TO FOUR 4 QUADRANTS (Data entry width in each quadrant is configurable as 34, 68, 136, or 272 bits.) UP TO 83 MILLION SUSTAINED SEARCHES
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M7010
68-bit
136-BIT
34-BIT
272-BIT
272-ball
AI04273
M7010
M7010R-066ZA1
M7010R-083ZA1
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netlogic tcam
Abstract: TCAM netlogic netlogic cypress tcam NetLogic npu TCAM NetLogic Microsystems network search engine netlogic tcam cypress netlogic processor
Text: TM A H i gh -D en sity M A C a nd CI D R Ta ble P ro cess or iFlow Address Processor Product Brief www.siliconaccess.com DESCRIPTION As network data rates have increased to 10 gigabits per second and higher, performance demands on the address lookup function have soared to more than 50
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iAP101224
netlogic tcam
TCAM netlogic
netlogic
cypress tcam
NetLogic npu
TCAM
NetLogic Microsystems
network search engine netlogic
tcam cypress
netlogic processor
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