LMU217
Abstract: cy7c517 LMU217JC25 LMU217JC35
Text: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517
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Original
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PDF
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LMU217
16-bit
CY7C517,
7217L,
Am29517
68-pin
LMU217
cy7c517
LMU217JC25
LMU217JC35
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LMU217JC45
Abstract: LMU217JC35 CY7C517 LMU217 LMU217JC55 LMU217JC65
Text: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517
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Original
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PDF
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LMU217
16-bit
CY7C517,
7217L,
Am29517
MIL-STD-883,
68-pin
LMU217JC45
LMU217JC35
CY7C517
LMU217
LMU217JC55
LMU217JC65
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CY7C517
Abstract: LMU217 LMU217JC25 LMU217JC35
Text: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517
|
Original
|
PDF
|
LMU217
16-bit
CY7C517,
7217L,
Am29517
68-pin
LMU217
CY7C517
LMU217JC25
LMU217JC35
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Untitled
Abstract: No abstract text available
Text: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517
|
Original
|
PDF
|
LMU217
16-bit
CY7C517,
7217L,
Am29517
68-pin
LMU217
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U217
Abstract: No abstract text available
Text: o . i\\\ Ci •Hi | LMU217 16 x 16 -bit Parallel m u ltip lier □ FV IC E S IN C O R P Q R A T F D FEATURES □ 25 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AM D Am 29517 □ Single Clock Architecture with
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OCR Scan
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PDF
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LMU217
16-bit
32-bit
R31-16
LMU217JC35
LMU217JC25
217-F
U217
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Untitled
Abstract: No abstract text available
Text: LMU217 16 x 16-bit Parallel multiplier DEV IC ES IN C O R PO R A TE D FEATURES □ 20 ns W orst-Case M ultiply Time □ Low P ow er CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, an d AMD Am29517 □ Single Clock A rchitecture w ith Register Enables
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OCR Scan
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PDF
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LMU217
16-bit
CY7C517,
7217L,
Am29517
MIL-STD-883,
68-pin
64-pin
|
Untitled
Abstract: No abstract text available
Text: LMU217 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES □ 20 ns Worst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517 □ Single Clock Architecture w ith Register Enables □ Two's Complement, Unsigned, or
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OCR Scan
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PDF
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LMU217
16-bit
CY7C517,
7217L,
Am29517
MIL-STD-883,
68-pin
64-pin
|
Untitled
Abstract: No abstract text available
Text: LMU217 16 x 16-bit Parallel multiplier DEV IC ES IN C O R PO R A TE D FEATURES □ 20 ns W orst-Case M ultiply Time □ Low P ow er CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, an d AMD Am29517 □ Single Clock A rchitecture w ith Register Enables
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OCR Scan
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PDF
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LMU217
16-bit
LMU217
32-bit
68-PIN
DD04bM2
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LMU217KMB55
Abstract: No abstract text available
Text: .»i> JLMU21Z m LMU217 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES_ □ 20 ns Worst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AM D Am29517 □ Single Clock Architecture with
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OCR Scan
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PDF
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JLMU21Z
LMU217
16-bit
CY7C517,
7217L,
Am29517
MIL-STD-883,
68-pin
64-pin
LMU217KMB55
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Untitled
Abstract: No abstract text available
Text: LMU217 16 x 16-bit Parallel m u ltip lie r DESCRIPTION FEATURES The LMU217 is a high-speed, low pow er 16-bit parallel multiplier. Full m ilitary ambient tem perature range operation is attained by the use of advanced CMOS technology. □ 20 ns W orst-C ase M ultiply Time
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OCR Scan
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PDF
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LMU217
16-bit
7217L
MIL-STD-883,
68-pin
64-pin
LMU217
32-bit
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Untitled
Abstract: No abstract text available
Text: LMU217 — — — L □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517 □ Single Clock Architecture with Register Enables □ Tw o’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ DECC SMD No. 5962-87686
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OCR Scan
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PDF
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LMU217
16-bit
CY7C517,
7217L,
Am29517
MIL-STD-883,
68-pin
64-pin
TheLMU217
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