LH53V4P00 Search Results

Contextual Info: LH53V4P00 CMOS 4M 512K x 8/256K × 16 MROM FEATURES PIN CONNECTIONS • 524,288 × 8 bit organization (Byte mode: BYTE = VIL) 262,144 × 16 bit organization (Word mode: BYTE = VIH) 40-PIN SOP TOP VIEW A17 1 40 A8 A7 2 39 A9 • Access time: 120 ns (MAX.)

lh5s4

Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh5s4

Abstract: lh537 48-TSOP LH5s 42-DIP 48TSOP1 LH5364P00D LH538 LH5S46
Contextual Info: MEMORIES • Mask ROM Specific Pinout ★ U n d e rd e v e lo p m e n t • 3 V 3 .3 V operation Access time B it C a p a c ity configuration 1M x8 2M x 8/x 16 4M x 8/x 16 8M x 8/x 16 16M x 8/x 16 32 M x 8/x 16 64M 128M * x 8/x 16 x 16 Readable at 2.7 V.

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

lh5s4

Abstract: lh5348 sharp lh53 lh5s47xx LH5S47 60446 sharp mask rom LH53V4R00N LH5H41XX TSOP032-P-0820
Contextual Info: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Description Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Pin Connection The L H 53V 4R 00N /T , L H 53V 4 R 0 0 N /T -2 U ser’s N o. : LH5V4RXX is a CMOS 4M -bit mask-programmable ROM 32-pin SOP

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

Contextual Info: MEMORIES ★ Capacity Configuration * 1 C om patible with 4 M -bit flash m em ories from A d vanced M icro D evices, Inc. * 2 C om patible with 4 M -bit flash m em ories from Intel Corp. A c c e s s tim e Under development MEMORIES ★ Under development Access time

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

lh5s4

Abstract: LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85
Contextual Info: MASK ROM ☆ New product ★ • M Capacity ASK F O M S Bit Pinout* configuration Model No. LH53V4T00E J J x8 4M x 16 x 8/ x 16 x8 8M x 8/ x 16 LH53V4ROOAN/AT LH53V4R00N/T J J J LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T J J F F LH534A00T

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080

sharp mask rom

Abstract: cd rom 40 pinout lh5348 lh5s4 LH5S
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53H4000 • Description The LH53H4000D/N User's No. : LH5H40XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits (Byte mode) or 262 144 X 16 bits (Word mode) that can be selected by BYTE input pin. ■ Features

lh5348

Abstract: lh5s4 lh5348xx sharp mask rom LH534A00T LH5s LH534B00T 40-DIP
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53H4100 • High-speed 4M-bit Mask-Programmable ROM ■ Description Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.

a5 vne

Contextual Info: SPEC No. ISSUE: E L 0 8 6 1 0 7 Jun. 19 1996 S P E C I F I C A T I O N S Product Type 4 M b i t M A S K R O M LH5V4Pxx Model No. L H 5 3 V 4 P 0 0 N iKThis specifications contains 14 pages including the cover and appendix. If you have any objections, please contact us before issuing purchasing order.

lh5s4

Abstract: lh5348 40-DIP LH53H4000D LH53H4000N 48TSOP 40-pin EPROM pinout sharp mask rom LH534B00T
Contextual Info: NEW PRODUCT INFORMATION S H A R P LH53H4000 • Description ■ The LH53H4000D/N User's No. : LH5H40XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits (Byte mode) or 262 144 X 16 bits (Word mode) that can be selected by BYTE input pin.

Contextual Info: CMOS 4M 512K x 8/256K x 16 MROM FEATURES • 524,288 x 8 bit organization (Byte mode: BYTE = V,L) 262,144 x 16 bit organization (Word mode: BYTE = V,H) PIN CONNECTIONS 40-P IN S O P TO P V IE W f Ai7 IZ 1 • a7 C 2 Ae C 3 • Access time: 120 ns (MAX.)

4P00-3

Abstract: sop40
Contextual Info: CMOS 4M 1M x 4 MROM FEATURES • 524,288 x 8 bit organization (Byte mode: BŸTË = V,L) 262,144 x 16 bit organization (Word mode: BYTE = V,H) • Access time: 120 ns (MAX.) • Supply current: -O p e ra tin g : 35 mA (MAX.) - Standby: 30[iA (M AX .) • Three-state output