rneg2
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103C DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 gapped clock • Monitor function for frame pulse, clock and data
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TXC-03103C
TXC-03103C-MB,
rneg2
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PDF
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0X00
Abstract: IEEE1284 OX9160
Text: OX9160 PCI Peripheral Bridge with EPP Parallel Port & 8/32 bit local bus FEATURES • • • • • • • 33MHz, 32-bit target PCI controller. Fully PCI 2.2 and PCI Power Management 1.0 compliant. 8- or 32-bit pass- through Local bus. IEEE1284 parallel port.
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OX9160
33MHz,
32-bit
IEEE1284
common25
0X00
OX9160
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PDF
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LT5503
Abstract: No abstract text available
Text: LT5521 Very High Linearity Active Mixer FEATURES • ■ ■ ■ ■ ■ ■ ■ U ■ DESCRIPTIO The LT 5521 is a very high linearity mixer optimized for low distortion and low LO leakage applications. The chip includes a high speed LO buffer with single-ended input
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Original
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LT5521
LT5521
95GHz
42dBm
LTC1758
LTC1957
LTC4400
OT-23
450kHz
LTC4401
LT5503
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PDF
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rneg2
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103C DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 gapped clock • Monitor function for frame pulse, clock and data
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TXC-03103C
TXC-03103C-MB
rneg2
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PDF
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HP 3D6
Abstract: GR-499-CORE 23D8 CH3401
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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Original
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TXC-03103
TXC-03103-MB
HP 3D6
GR-499-CORE
23D8
CH3401
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PDF
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TAB 429 H
Abstract: ch3406
Text: QT1F-Plus Device t r a n S w it c h QuadTI Framer-Plus TXC-03103 DATASHEET FEATURES DESCRIPTION • D4 SF; ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AM I/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock
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OCR Scan
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TXC-03103-MB
TAB 429 H
ch3406
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PDF
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c8c1
Abstract: No abstract text available
Text: Im •■ § QT1F-P/us Device l/lf l T r T H ■ Quad T1 Framer-P/i/s TXC-03103 DATASHEET FEATURES DESCRIPTION • D4 SF; ESF (including HDLC Link support), and transparent framing modes • Delects, counts and forces line code errors (BPVs and excess zeros), CFC errors (ESF only), and frame bit
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OCR Scan
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TXC-03103
TXC-03103-MB
c8c1
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PDF
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GR-499-CORE
Abstract: CH1290 tds0 1150
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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TXC-03103
TXC-03103-MB
GR-499-CORE
CH1290
tds0 1150
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PDF
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MABACT00103
Abstract: LBD21 c 5521 GLSW4M202 marking ACOM LINEAR 5521 CT001 CX2045 ETC1-1-13 LT5521
Text: LT5521 Very High Linearity Active Mixer U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LT 5521 is a very high linearity mixer optimized for low distortion and low LO leakage applications. The chip includes a high speed LO buffer with single-ended input
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Original
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LT5521
LT5521
95GHz
42dBm
LTC1758
LTC1957
LTC4400
OT-23
450kHz
LTC4401
MABACT00103
LBD21
c 5521
GLSW4M202
marking ACOM LINEAR
5521
CT001
CX2045
ETC1-1-13
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PDF
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PLX9050
Abstract: No abstract text available
Text: PLX Technology Acquired Oxford Semiconductor in January 2009 This document is not yet formatted to PLX style For more information, please visit our Website Website: Sales: Technical Support: www.plxtech.com www.plxtech.com/sales www.plxtech.com/support 2009 PLX Technology, Inc. All rights reserved.
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OX16PCI954
16C950
8/32-bit
IEEE1284
16C550-type
15Mbps
60McCarthy
DS-0029
PLX9050
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PDF
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16C954
Abstract: OX16PCI950 OX16PCI954-TQC60-A1 OX16PCI954-TQ-A1G OX16PCI954-TQa1g OX16PCI954 16C950 16C952 icl 7103 16C550 IEEE1284
Text: OX16PCI954 Integrated Quad UART and PCI interface FEATURES • • • • • • • • • • Four 16C950 High performance UART channels 8/32-bit Pass-through Local Bus IEEE1284 EPP parallel port Multi-function target PCI controller, fully PCI 2.2 and
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Original
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OX16PCI954
16C950
8/32-bit
IEEE1284
16C550-type
15Mbps
60Mbps
128-byte
DS-0029
16C954
OX16PCI950
OX16PCI954-TQC60-A1 OX16PCI954-TQ-A1G
OX16PCI954-TQa1g
OX16PCI954
16C952
icl 7103
16C550
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PDF
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LBD10
Abstract: lbd8 OX16C952 0X00 IEEE1284 OX9160 OX9160-TQC33-A LT230 LBD21 a21001
Text: OX9160 PCI Peripheral Bridge with EPP Parallel Port & 8/32 bit local bus FEATURES • • • • • • • 33MHz, 32-bit target PCI controller. Fully PCI 2.2 and PCI Power Management 1.0 compliant. 8- or 32-bit pass-through Local bus. IEEE1284 parallel port.
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Original
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OX9160
33MHz,
32-bit
IEEE1284
LBD10
lbd8
OX16C952
0X00
OX9160
OX9160-TQC33-A
LT230
LBD21
a21001
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PDF
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Untitled
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET = • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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TXC-03103
TXC-03103-MB
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PDF
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OX16PCI950
Abstract: 16C954 16C950 OX16C952 OX16C950 OX16PCI954 16C952 Oxford Semiconductor 16c550 uart 16c950 16C550
Text: OX16PCI954 Integrated Quad UART and PCI interface FEATURES • • • • • • • • • • Four 16C950 High performance UART channels 8/32-bit Pass-through Local Bus IEEE1284 EPP parallel port Multi-function target PCI controller, fully PCI 2.2 and
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Original
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OX16PCI954
16C950
8/32-bit
IEEE1284
16C550-type
15Mbps
60Mbps
128-byte
receiv14
OX16PCI950
16C954
OX16C952
OX16C950
OX16PCI954
16C952
Oxford Semiconductor 16c550
uart 16c950
16C550
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PDF
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Untitled
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer -Plus TXC-03103 DATA SHEET DESCRIPTION APPLICATIONS LINE SID E SYSTEM TERM INAL SID E DS1 Dual Rail/NRZ 4 x3 Data & Clocks <- \ — Interrupt/Select -4 Transceiver Serial Interface = • SONET/SDH terminal or add/drop multiplexers
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TXC-03103
TXC-03103
128-Pin
TXC-03103-MB
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PDF
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Untitled
Abstract: No abstract text available
Text: t QT1F-Plus Device y t f | T f I i | - Quad T1 Framer-P/us TXC-03103B DATASHEET DESCRIPTION D4 SF, ESF including HDLC Link support , and transparent framing modes Encodes/decodes AMI/B8ZS and forced ones density line codes Fractional T1 Gapped Clock
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OCR Scan
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TXC-03103B
comp-22-730-5991
TXC-03103B-MB
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PDF
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CH3401
Abstract: sil 9002 sil 9002 csu cfa 326 Intel x58 CH343b syc01 RFD24 RFD22 ch3406
Text: Q T 1 F - P lu s D e v ic e Quad T1 Framer-Plus TXC-03103 DATA SHEET . = • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock
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OCR Scan
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TXC-03103
TXC-03103-MB
CH3401
sil 9002
sil 9002 csu
cfa 326
Intel x58
CH343b
syc01
RFD24
RFD22
ch3406
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PDF
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CH3401
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103B DATA SHEET DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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TXC-03103B
TXC-03103B-MB
CH3401
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PDF
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220 EH 4D6
Abstract: TF017 TF024 358 ez 802 Intel x58 MARK RF01 sf 118 d tda 4439 tx-f 433 GR-499-CORE
Text: QT1F-Plus Device Quad T1 Framer -Plus TXC-03103 DATA SHEET DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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OCR Scan
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TXC-03103
TXC-03103
128-Pin
220 EH 4D6
TF017
TF024
358 ez 802
Intel x58
MARK RF01
sf 118 d
tda 4439
tx-f 433
GR-499-CORE
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PDF
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GR-499-CORE
Abstract: No abstract text available
Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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Original
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TXC-03103
TXC-03103-MB
GR-499-CORE
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PDF
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RFD24
Abstract: CH1290 LBD21 30f 124
Text: BACK QT1F-Plus Device Quad T1 Framer-Plus TXC-03103 DATA SHEET FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 Gapped Clock • Monitor function for frame pulse
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Original
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TXC-03103
TXC-03103-MB
RFD24
CH1290
LBD21
30f 124
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PDF
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