L7C185KM Search Results

L7C185

Contextual Info: L7C185 L7C185 DEVICES INCORPORATED 8K x 8 Static RAM Low Power 8K x 8 Static RAM (Low Power) DEVICES INCORPORATED DESCRIPTION ROW SELECT 8 O ROW ADDRESS CE 1 CE 2 WE OE CONTROL as 2 V. The L7C185 and L7CL185-L consume only 30 µW and 15 µW (typical) respectively at 3 V, allowing

Contextual Info: LOGIC DEVICES INC 8K X 8 Static RAM 2bE D Low Power FEATURES • 55L.5Ì05 aOGlG3b 7 ■ L 7 C 1 8 5 / L 7 C L 1 8 5 DESCRIPTION 'T ¥ ¿ - 2 3 -/1 li data may be retained in inactive stor­ The L7C185 and L7CL185 are highperformance, low-power CMOS static age with a supply voltage as low as

ed18810

Abstract: 5962-3829453MTa QML-38535 5962-3829410MYX 5962-R085-93 IDT7164L70L32B 5962-3829412MXA GDIP1-T28 5C640 UT6717685
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED E Added chanaes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frve F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout.

Contextual Info: L7C185 : v ;:i s r.r:;H pnH A m l FEATURES □ 8K x 8 Static RAM with Chip Select Pow erdow n, O utput Enable □ A uto-Pow erdow n Design □ A dvanced CMOS Technology □ High Speed — to 12 ns m axim um □ Low Pow er Operation Active: 425 m W typical at 25 ns

L7C185KM25

Abstract: IDT7164 L7C185PC12 L7C185PC15 L7C185PC20
Contextual Info: L7C185 L7C185 DEVICES INCORPORATED 8K x 8 Static RAM Low Power 8K x 8 Static RAM (Low Power) DEVICES INCORPORATED FEATURES DESCRIPTION q 8K x 8 Static RAM with Chip Select Powerdown, Output Enable q Auto-Powerdown Design q Advanced CMOS Technology q High Speed — to 12 ns maximum

HM1E

Abstract: 5962-3829435 IDT7164L70L32B mk48h64 5962-3829407MXX 62l64-45 HC6364 5962-8552505X QML-38535 IDT7164S55DB
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED E Added changes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frye F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout.

Contextual Info: L7C185 8K x 8 Static RAM Low Power DEVICES INCORPORATED DESCRIPTION FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 12 ns maximum □ Low Power Operation

L7C185NC45

Contextual Info: LOGIC D E V I C E S lENC ILE D • SS bST DS QGO0S7b 1 L7C185 8K x 8 Static RAM Features -r-1/6-23-/2. Description □ 8K by 8 Static RAM with chip select The L7C185 is a high-performance, low-power CMOS static RAM. The powerdown, output enable storage circuitry is organized as 8,192

Contextual Info: 8K X 8 Static RAM L7C1 85/L7GL1 85 Low Power FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 10 ns maximum □ Low Power Operation Active: 320 mW (L7C185) typical at 35 ns

QP7C185A-55DMB

Abstract: QP7C185A IDT7164L70L32B QP7C185A-70DMB qml-38535 MT5C6408C-20 5962-3829435 EDI8810L 0EU86 22 35L CAPacitor
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED E Added changes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frye F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout.

Contextual Info: L7C185 D E V IC F S IN C O R P O R A I h l ' FEATURES □ 8K x 8 Static R A M w ith C hip Select Pow erd ow n, O utpu t Enable □ A uto-Pow erdow n Design □ A dvanced C M O S Technology □ H igh Sp eed — to 12 ns m axim um □ Low Pow er O peration

Contextual Info: L7C185 8K x 8 Static RAM Low Power DEVICES INCORPORATED DESCRIPTION □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 10 ns maximum □ Low Power Operation Active: 320 mW typical at 35 ns

IDT7164

Contextual Info: LOGIC DEVICES INC 8K X 8 Static RAM 2bE D Low Power FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 10 ns maximum Q Low Power Operation Active: 320 mW (L7C185) typical at 35 ns

TI18

Contextual Info: L7C185 8K x 8 Static RAM Low Power DESCRIPTION FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, O utput Enable □ □ □ □ Auto-Powerdown Design A dvanced CM OS Technology H igh Speed — to 12 ns m aximum Low Power Operation Active: 425 mW typical at 25 ns

l7c185uc85

Abstract: l7C185VC-85 L7C185nc
Contextual Info: LOGIC D E V I C E S lENC ILE D • SSbSTDS Features Description □ 8K by 8 Static RAM with chip select powerdown, output enable The L7C185 is a high-performance, low-power CMOS static RAM. The storage circuitry is organized as 8,192 words by 8 bits per word. The 8 Data