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    k4s643232f

    Abstract: KS RMII Reduced MII aa2c "routing tables"
    Text: PacketTrunk-4 Device TDMoIP/MPLS Gateway Device TXC-05870 DESCRIPTION • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC, interface via MII/RMII/SMII/SSMII; HDX or FDX • VLAN support per IEEE 802.1 p & Q • Four independent advanced clock recovery blocks


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    PDF TXC-05870 TXC-05870-MB, TXC-05870 k4s643232f KS RMII Reduced MII aa2c "routing tables"

    TCXO A31 10MHZ

    Abstract: MT48LC4M32B2TG-6 L1V16 Datum OCXO
    Text: PRELIMINARY PRODUCT BRIEF: SUBJECT TO CHANGE Rev: 091407 DS34S108, DS34S104, DS34S102, DS34S101 Description Abridged General Description Features The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34S108 allows up to eight T1/E1 links or frame-based serial HDLC links to be


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    PDF DS34S108, DS34S104, DS34S102, DS34S101 DS34S108 823/G board25 DS34S108 TCXO A31 10MHZ MT48LC4M32B2TG-6 L1V16 Datum OCXO

    Untitled

    Abstract: No abstract text available
    Text: Rev: 032609 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial


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    PDF DS34S101, DS34S102, DS34S104, DS34S108 823/G DS34S10x DS34S101 DS34S102

    TXC-06010-MB

    Abstract: TXC-06010 samsung Capacitance lables transwitch packettrunk fifo synchronus asynchronus PacketTrunk
    Text:  PacketTrunk-4 Plus Device TDMoIP/MPLS Gateway Device TXC-06010 DATA SHEET PRODUCT PREVIEW TXC-06010-MB, Ed. 2 June 2006 FEATURES APPLICATIONS • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC interface via MII/RMII/SMII/SSMII; HDX or


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    PDF TXC-06010 TXC-06010-MB, TXC-06010-MB TXC-06010 samsung Capacitance lables transwitch packettrunk fifo synchronus asynchronus PacketTrunk

    Untitled

    Abstract: No abstract text available
    Text: Rev: 032609 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial


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    PDF DS34S101, DS34S102, DS34S104, DS34S108 DS34S101 DS34S102

    Untitled

    Abstract: No abstract text available
    Text: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Obselete partial refresh function Obselete 5ns speed grade Change ICC3P from 3mA to 5mA September 26,2002 September 05,2003


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    PDF IC42S32200 IC42S32200L 64-MBIT) DR036-0B 166MHz 143MHz

    Untitled

    Abstract: No abstract text available
    Text: PacketTrunk-4 Device TDMoIP/MPLS Gateway Device TXC-05870 DESCRIPTION • Four T1/E1/Serial or one T3/E3/STS-1 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC, interface via MII/RMII/SMII/SSMII; HDX or FDX • VLAN support per IEEE 802.1 p & Q • Four independent advanced clock recovery blocks


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    PDF TXC-05870 TXC-05870-MB,

    IC42S32800

    Abstract: 2M Words x 32 Bits x 4 Banks (256-MBIT) IC42S32800L L6TI 2M Words x 32 Bits x 4 Banks 256-MBIT
    Text: IC42S32800 IC42S32800L Document Title 2M x 32 Bit x 4 Banks 256-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Revise Page22 typo October 05,2004 December 21,2004 Remark The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and


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    PDF IC42S32800 IC42S32800L 256-MBIT) Page22 DR046-0B opera13mm 400mil IC42S32800 2M Words x 32 Bits x 4 Banks (256-MBIT) IC42S32800L L6TI 2M Words x 32 Bits x 4 Banks 256-MBIT

    IC42S32200

    Abstract: IC42S32200L
    Text: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date Remark 0A Initial Draft September 26,2002 Preliminary The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and


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    PDF IC42S32200 IC42S32200L 64-MBIT) DR036-0A o66MHz 143MHz IC42S32200 IC42S32200L

    RFC-5087

    Abstract: TXC-06010AIBG TXC-06010-MB K4S283232E 0X0076 cesopsn TXC-06010
    Text: PacketTrunk-4 Plus Device TDM-over-Packet Gateway Device TXC-06010 DATA SHEET PRELIMINARY TXC-06010- MB, Ed. 6 December 2009 FEATURES APPLICATIONS • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC interface via MII/RMII/SMII/SSMII;HDX or


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    PDF TXC-06010 TXC-06010- TXC-06010-MB, RFC-5087 TXC-06010AIBG TXC-06010-MB K4S283232E 0X0076 cesopsn TXC-06010

    diode CH9d

    Abstract: CH7C diode CH8C diode diode ch6b rg703 Diode TS21C diode code eb13 RFC-5087 10407C 2125S
    Text: 19-4835; 8/09 DS34T101, DS34T102, DS34T104, DS34T108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial


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    PDF DS34T101, DS34T102, DS34T104, DS34T108 823/G DS34T108. DS34T104. diode CH9d CH7C diode CH8C diode diode ch6b rg703 Diode TS21C diode code eb13 RFC-5087 10407C 2125S

    IC42S32200

    Abstract: IC42S32200L DR036-0D
    Text: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Obselete partial refresh function Obselete 5ns speed grade Change ICC3P from 3mA to 5mA Revise typo Revise p.20,p.22 data and p.28 typo


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    PDF IC42S32200 IC42S32200L 64-MBIT) DR036-0D 512mperature 166MHz 143MHz IC42S32200 IC42S32200L

    IC42S32400

    Abstract: IC42S32400L
    Text: IC42S32400 IC42S32400L Document Title 1M x 32 Bit x 4 Banks 128-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B 0C Initial Draft Revise Page22 typo Revise p.22 data and p.28 typo December 01,2003 December 21,2004 February 01,2005 Remark


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    PDF IC42S32400 IC42S32400L 128-MBIT) Page22 DR038-0C 166MHz IC42S32400 IC42S32400L

    TS21C

    Abstract: No abstract text available
    Text: 19-4835; 8/09 DS34T101, DS34T102, DS34T104, DS34T108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial


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    PDF DS34T101, DS34T102, DS34T104, DS34T108 823/G DS34T108. DS34T104. TS21C

    hynix ddr ram

    Abstract: No abstract text available
    Text: PacketTrunk-4 Device TDMoIP/MPLS Gateway Device TXC-05870 DESCRIPTION • Four T1/E1/Serial or one T3/E3/STS-1 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC, interface via MII/RMII/SMII/SSMII; HDX or FDX • VLAN support per IEEE 802.1 p & Q • Four independent advanced clock recovery blocks


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    PDF TXC-05870 TXC-05870-MB, hynix ddr ram

    e1 E2 e3 liu transceiver

    Abstract: No abstract text available
    Text: PRELIMINARY-SUBJECT TO CHANGE ABRIDGED DATA SHEET Rev: 091407 DS34S101//DS34S102/DS34S104/DS34S108 Single/Dual/Quad/Octal TDM-Over-Packet Transport Devices General Description The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34S108 allows up to eight T1/E1


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    PDF DS34S108 823/G DS34S101/DS34S102/DS34S104/DS34S108 e1 E2 e3 liu transceiver

    Untitled

    Abstract: No abstract text available
    Text: ABRIDGED DATA SHEET Rev: 040108 DS34S101//DS34S102/DS34S104/DS34S108 Single/Dual/Quad/Octal TDM-Over-Packet Transport Devices General Description The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC RFC-compliant DS34S108 allows up to eight T1/E1 links or frame-based serial HDLC links to be


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    PDF DS34S101//DS34S102/DS34S104/DS34S108 32-Bit 16-Bit

    2058d

    Abstract: 4560d
    Text: OPERATIONAL AMPLIFIER ELECTRICAL CHARACTERISTICS TABLE • Bipolar Power Circuit Functions Supply General S in g le r>ial S u p p ly PKG Ty p e No. VIO typ. mV ilO typ. inA) Icc typ. (mA) G.B. typ. (MH2) S.R. typ (V/uS) N JM 2 9 0 4 D /M /V /L DIP/D M P/SS O P/S IP-8


    OCR Scan
    PDF 48jtfV 12/iV 35nV/vHz SSOP-14 SSOP-14 2058d 4560d