L50112E Search Results
L50112E Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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TTL LS 7400
Abstract: ttl 7400 marking WV1 transistor TTL 7400 national semiconductor 74H Logic Family Specifications IC 7400 nand gate MIL-STD-806B LS TTL family characteristics transistor f259 internal structure 74LS00 nand gate
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Contextual Info: National Semiconductor 54F/74F192 Up/Down Decade Counter with Separate Up/Down Clocks General Description The ’F192 is an up/down BCD decade 8421 counter. Sep arate Count Up and Count Down Clocks are used, and in either counting mode the circuits operate synchronously. |
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54F/74F192 | |
Contextual Info: DM74LS22 Dual 4-Input NAND Gate with Open-Collector Output General Description The 'LS22 contains two independent NAND gates, each with four data inputs. Connection Diagram Dual-ln-Llne Package TL/F/10168—1 Order Number DM74LS22M or DM74LS22N See NS Package Number M14A or N14A |
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DM74LS22 TL/F/10168â DM74LS22M DM74LS22N L50112E -B30M 105/Printed DM74LS22 | |
Contextual Info: o> o> Ol National Semiconductor 54F/74F299 Octal Universal Shift/Storage Register with Common Parallel I/O Pins General Description Features The 'F299 is an 8-bit universal shift/storage register with TRI-STATE outputs. Four modes of operation are possi |
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54F/74F299 |