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    ICE40 LATTICE Search Results

    ICE40 LATTICE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    ADC1413D080W2-DB Renesas Electronics Corporation ADC1413D080W2 demo board, Lattice ECP3 on board Visit Renesas Electronics Corporation
    DAC1408D650W2-DB Renesas Electronics Corporation DAC1408D650W2 demo board with Lattice ECP3 Visit Renesas Electronics Corporation
    ADC1213D080W2-DB Renesas Electronics Corporation ADC1213D080W2 demo board, Lattice ECP3 on board Visit Renesas Electronics Corporation
    ADC1213D080WO-DB Renesas Electronics Corporation ADC1213D080WO demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation
    ADC1413D065WO-DB Renesas Electronics Corporation ADC1413D065W0 demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation

    ICE40 LATTICE Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX/LM Family Handbook HB1011 Version 01.2, November 2013 iCE40 LP/HX/LM Family Handbook Table of Contents October 2013 Section I. iCE40 LP/HX Family Data Sheet Introduction Features . 1-1


    Original     		iCE40â HB1011 iCE40 TN1251 PDF

    WR06X000

    Abstract: No abstract text available
    Text: iCE40 16-WLCSP Evaluation Kit User’s Guide February 2014 EB84_01.0 iCE40 16-WLCSP Evaluation Kit Introduction Thank you for choosing the Lattice iCE40TM 16-WLCSP Evaluation Kit. This guide describes how to begin using the iCE40 16-WLCSP Evaluation Kit, an easy-to-use platform for rapidly


    Original     		iCE40 16-WLCSP iCE40TM FT2232HL WR06X000 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 Ultra Family Data Sheet DS1048 Version 1.4, August 2014 iCE40 Ultra Family Data Sheet Introduction August 2014 Data Sheet DS1048 General Description iCE40 Ultra family is an ultra-low power FPGA and sensor manager designed for ultra-low power mobile applications, such as smartphones, tablets and hand-held devices. The iCE40 Ultra family includes integrated SPI and I2C


    Original     		iCE40 DS1048 DS1048 PDF

    8x816

    Abstract: DS1048
    Text: iCE40 Ultra Family Data Sheet Preliminary DS1048 Version 1.3, July 2014 iCE40 Ultra Family Data Sheet Introduction July 2014 Preliminary Data Sheet DS1048 General Description iCE40 Ultra family is an ultra-low power FPGA and sensor manager designed for ultra-low power mobile applications, such as smartphones, tablets and hand-held devices. The iCE40 Ultra family includes integrated SPI and I2C


    Original     		iCE40 DS1048 DS1048 30-ball SWG30 8x816 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.8, February 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode  Flexible Logic Architecture


    Original     		iCE40â DS1040 iCE40 DS1040 iCE40-1K iCE40LP/HX1K iCE40LP640 iCE40LP1K PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.9, April 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode


    Original     		iCE40â DS1040 iCE40 DS1040 LP384 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP Series Ultra Low-Power mobileFPGA™ Family March 22, 2012 1.3 Data Sheet Figure 1: iCE40 LP-Series Family Architectural Features  LP-Series - Smartphone targeted series Programmable Logic Block (PLB) optimized for low power 35 µA at f =0 kHz (Typical)


    Original     		iCE40â iCE40 iCE65 iCEman40LP 22-MAR-2012) PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.5, August 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		iCE40â DS1040 iCE40 DS1040 Distribut2013 PDF

    ICE40 FPGA

    Abstract: 4-input-XOR 256x16* STATIC RAM ICE40 ICE40HX1K-VQ100
    Text: iCE40 HX-Series Ultra Low-Power FPGA Family October 03, 2012 1.32 Data Sheet Figure 1: iCE40 HX-Series Family Architectural Features  HX-Series - optimized for high performance  Low cost package offerings  80% faster than iCE65  Proven, high-volume 40 nm, low-power


    Original     		iCE40TM iCE40 iCE65 5-MAR-2012 13-FEB-2012 15-DEC-2011 31-OCT-2011 11-JUL-2011 03-OCT-2012) ICE40 FPGA 4-input-XOR 256x16* STATIC RAM ICE40HX1K-VQ100 PDF

    LATTICE SEMICONDUCTOR Tape and Reel Specification

    Abstract: LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.3, May 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		iCE40TM DS1040 iCE40 DS1040 LATTICE SEMICONDUCTOR Tape and Reel Specification LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.4, July 2013 iCE40 LP/HX Family Data Sheet Introduction July 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		iCE40â DS1040 iCE40 DS1040 PDF

    LSM330DLC application note

    Abstract: LSM303
    Text: iCE40 Low Power Sensor Hub Solution for Mobile Devices June 2014 Reference Design RD1189 General Description The iCE40 Sensor Hub Solution is a low power sensor hub solution for mobile devices using iCE40LM and iCE40 Ultra FPGAs. It is designed to monitor sensors and periodically send the sensor data to the application processor. The Sensor Hub reference design acts as a buffer between the sensors and the application processor. When


    Original     		iCE40 RD1189 iCE40LM iCE40 BMP085 LSM303DLHC LSM330DLC LSM330DLC application note LSM303 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 3.0, July 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode


    Original     		iCE40â DS1040 iCE40 DS1040 iCE40LP1K. PDF

    ultra fine pitch BGA

    Abstract: HX640 BGA Package 14x14 ICE40 lattice sub-lvds ICE40 FPGA 132-BA
    Text: iCE40 HX-Series Ultra Low-Power mobileFPGA™ Family March 30, 2012 1.31 Data Sheet Figure 1: iCE40 HX-Series Family Architectural Features  HX-Series - Tablet targeted series optimized for high performance Low cost package offerings 80% faster than iCE65


    Original     		iCE40TM iCE65 iCE40 5-MAR-2012 13-FEB-2012 15-DEC-2011 31-OCT-2011 11-JUL-2011 30-MAR-2012) ultra fine pitch BGA HX640 BGA Package 14x14 ICE40 lattice sub-lvds ICE40 FPGA 132-BA PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.7, October 2013 iCE40 LP/HX Family Data Sheet Introduction October 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		iCE40â DS1040 iCE40 DS1040 iCE40-1K iCE40LP/HX1K iCE40LP640 PDF

    ice40lp

    Abstract: ICE40 FPGA sublvds to lvds lp1k BGA 81 ball
    Text: iCE40 LP Series Ultra Low-Power mobileFPGA™ Family March 30, 2012 1.31 Data Sheet Figure 1: iCE40 LP-Series Family Architectural Features  LP-Series - Smartphone targeted series Programmable Logic Block (PLB) optimized for low power 35 µA at f =0 kHz (Typical)


    Original     		iCE40TM iCE65 iCE40 5-MAR-2012 13-FEB-2012 15-DEC-2011 31-OCT-2011 11-JUL-2011 30-MAR-2012) ice40lp ICE40 FPGA sublvds to lvds lp1k BGA 81 ball PDF

    ICE40 FPGA

    Abstract: ICE40LP1K-CM121 ICE40LP1K ice40lp 225ba ICE40LP1K-CM36 ICE40
    Text: iCE40 LP Series Ultra Low-Power FPGA Family October 03, 2012 1.32 Figure 1: iCE40 LP-Series Family Architectural Features LP-Series - optimized for low power Ultra-small footprints Proven, high-volume 40 nm, low-power CMOS technology I/O Bank 0 I/O Bank 1


    Original     		iCE40TM iCE65 iCE40 5-MAR-2012 13-FEB-2012 15-DEC-2011 31-OCT-2011 11-JUL-2011 03-OCT-2012) ICE40 FPGA ICE40LP1K-CM121 ICE40LP1K ice40lp 225ba ICE40LP1K-CM36 PDF

    ICE40 lattice

    Abstract: ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.2, April 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		iCE40TM DS1040 iCE40 DS1040 ICE40 lattice ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCEdragon Demo Board User’s Guide November 2012 EB80_01.0 iCEdragon Demo Board Introduction Thank you for choosing the iCEdragon Demo Board. This board is designed to help you develop hardware solutions based on the Android OS using the iCE40™ ultra-low density FGPA.


    Original     		iCE40â iCE40-HX8K 256-ball M25P80 iCE40HX8K-CT256 00/SPI 01/SPI 02/SPI 03/SPI PDF

    n25q32

    Abstract: No abstract text available
    Text: iCEstick Evaluation Kit User’s Guide August 2013 EB82_01.0 iCEstick Evaluation Kit Introduction Thank you for choosing the Lattice Semiconductor iCEstick Evaluation Kit. This guide describes how to start using the iCEstick Evaluation Kit, an easy-to-use USB form factor board for rapidly prototyping designs using the iCE40 FPGA. Along with the evaluation board, this kit includes a pre-loaded


    Original     		iCE40 CDBU0520 ICE40HX1K-STICK-EVN n25q32 PDF

    25p10av

    Abstract: PMOD12 25P10 od3 Voltage Regulator arduino Example capacitive touch ADP2140ACPZ3312R7 DSC101 ICE40HX1K-VQ100 2140ACP
    Text:  iCEblink40 iCE40HX1K Evaluation Kit User’s Guide May 2012 Revision: EB73_01.0  iCEblink40 iCE40HX1K Evaluation Kit User’s Guide Introduction Thank you for choosing the Lattice Semiconductor iCEblink 40 HX1K Evaluation Kit. This guide describes how to begin using the iCEblink40 Evaluation Kit, an easy-to-use platform for rapidly prototyping designs using the iCE40 mobileFPGA™.


    Original     		iCEblink40 iCE40HX1K iCEblinkTM40 iCE40 th0-002 25p10av PMOD12 25P10 od3 Voltage Regulator arduino Example capacitive touch ADP2140ACPZ3312R7 DSC101 ICE40HX1K-VQ100 2140ACP PDF

    Lattice Socket Products

    Abstract: LFE3-95EA
    Text: Rev 5.7 Lattice Socket Adapter Listing Lattice Desktop Programmers The Lattice Model 300 Desktop Programmer enables programming of all Lattice families except iCE without soldering on a printed circuit board. The Model 300 is supported by the Lattice Programming Cable (HW-USBN-2A is included with the Model 300). To program a specific Lattice device, an appropriate Lattice socket adapter must


    Original     		PN-Q208-GDX160V PN-FB208/GX160V pDS4102-FB208-C1) PA-FB388/GX240VA PN-T48/CLK5510V PN-T100/CLK5520V PN-S64-CLK5410D Model300 Lattice Socket Products LFE3-95EA PDF

    ispmach lc4032

    Abstract: Lattice Socket Products LFE3-95EA
    Text: Rev 5.8.1 Lattice Socket Adapter Listing Lattice Desktop Programmers The Lattice Model 300 Desktop Programmer enables programming of all Lattice families except iCE without soldering on a printed circuit board. The Model 300 is supported by the Lattice Programming Cable HW-USBN-2A is included with the Model 300 . To program a specific Lattice device, an appropriate Lattice socket adapter must be


    Original     		pDS4102-FB208-C1) PN-Q208-GDX160V PN-FB208/GX160V PA-FB388/GX240VA PN-T48/CLK5510V PN-T100/CLK5520V Model300 ispmach lc4032 Lattice Socket Products LFE3-95EA PDF

    sony IMX 159 camera

    Abstract: IMX169 sony IMX 220 camera Sony IMX169 sony cmos sensor imx 159 CSI lvds sony IMX 159 sensor IMX169CQK-C 240/SONY CMOS sensor imx
    Text:  CSI2 to Parallel Bridge Board User’s Guide February 2013 Revision: EB81_01.1  CSI2 to Parallel Bridge Board User’s Guide Introduction The CSI2 to Parallel Bridge Board comprises a compact, low cost, MIPI CSI2 Camera Serial Interface image sensor, lens and lens housing with adjustable focus, that can bolt directly onto the Lattice HDR-60 Base Board or the


    Original     		HDR-60 IMX169 sony IMX 159 camera sony IMX 220 camera Sony IMX169 sony cmos sensor imx 159 CSI lvds sony IMX 159 sensor IMX169CQK-C 240/SONY CMOS sensor imx PDF