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    HCT112 Search Results

    HCT112 Result Highlights (2)

    Part ECAD Model Manufacturer Description Download Buy
    CD74HCT112E Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Visit Texas Instruments Buy
    CD54HCT112F3A Texas Instruments High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger 16-CDIP -55 to 125 Visit Texas Instruments Buy
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    HCT112 Price and Stock

    Rochester Electronics LLC CD74HCT112E

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey CD74HCT112E Tube 12,422 928
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    Rochester Electronics LLC 74HCT112N,652

    IC FF JK TYPE DUAL 1BIT 16DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74HCT112N,652 Tube 7,657 620
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    Rochester Electronics LLC 74HCT112D,652

    IC FF JK TYPE DUAL 1BIT 16SO
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    DigiKey 74HCT112D,652 Bulk 7,332 1,142
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    Rochester Electronics LLC 74HCT112DB,112

    IC FF JK TYPE DUAL 1BIT 16SSOP
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    DigiKey 74HCT112DB,112 Tube 3,276 1,211
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    Nexperia 74HCT112D,652

    IC FF JK TYPE DUAL 1BIT 16SO
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    Newark 74HCT112D,652 Bulk 1
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    Rochester Electronics 74HCT112D,652 7,332 1
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    TME 74HCT112D,652 1 3
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    Avnet Silica 74HCT112D,652 50
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    EBV Elektronik 74HCT112D,652 50
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    Find more HCT112 price and stock on Findchips.com

    HCT112 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    IN74ACT112D

    Abstract: IN74ACT112N
    Text: TECHNICAL DATA IN74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.


    Original     		IN74ACT112 IN74ACT112 LS/ALS112, HC/HCT112. IN74ACT112N IN74ACT112D PDF

    KK74AC112

    Abstract: KK74AC112D KK74AC112N
    Text: TECHNICAL DATA KK74AC112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The KK74AC112 is identical in pinout to the LS/ALS112, HC/HCT112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs.


    Original     		KK74AC112 KK74AC112 LS/ALS112, HC/HCT112. KK74AC112N KK74AC112D 012AC) PDF

    Scans-052

    Abstract: No abstract text available
    Text: CD54HC112F3A, HCT112F3A June 1997 Dual J-K Flip-Flop with Set and Reset File Number 3774.1 Functional Diagram This device is fully compliant to the requirements of paragraph 1.2.1 of MIL-STD-883. The CD54HC/HCT112F3A utilizes silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL


    OCR Scan     		CD54HC112F3A, CD54HCT112F3A MIL-STD-883. CD54HC/HCT112F3A CD54HCT CD54HC/HCT112 54HC/HCT112 50kHz 25kHz Scans-052 PDF

    IN74AC112

    Abstract: IN74AC112D IN74AC112N
    Text: TECHNICAL DATA IN74AC112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC112 is identical in pinout to the LS/ALS112, HC/HCT112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS


    Original     		IN74AC112 IN74AC112 LS/ALS112, HC/HCT112. IN74AC112N IN74AC112D PDF

    KK74ACT112

    Abstract: KK74ACT112D KK74ACT112N
    Text: TECHNICAL DATA KK74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The KK74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The KK74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.


    Original     		KK74ACT112 KK74ACT112 LS/ALS112, HC/HCT112. KK74ACT112N KK74ACT112D 012AC) PDF

    IN74ACT112N

    Abstract: IN74ACT112D
    Text: TECHNICAL DATA IN74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.


    Original     		IN74ACT112 IN74ACT112 LS/ALS112, HC/HCT112. IN74ACT112N IN74ACT112D 012AC) PDF

    54LS

    Abstract: No abstract text available
    Text: CD54HC112/3A HCT112/3A S E M I C O N D U C T O R Dual J-K Flip-Flop with Set and Reset June 1997 Description Functional Diagram This device is fully compliant to the requirements of paragraph 1.2.1 of MIL-STD-883. 1S 1J The CD54HC/HCT112/3A utilizes silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL


    Original     		CD54HC112/3A CD54HCT112/3A MIL-STD-883. CD54HC/HCT112/3A 1-800-4-HARRIS 54LS PDF

    HCT112

    Abstract: HCT-112 74HC 74HCT S0 1J
    Text: 7 4H C /H C T 112 flip-flops DUAL JK FLIP-FLOP WITH SET AND RESET; IMEGATIVE-EDGE TRIGGER FEATURES TYPICAL The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky T T L LSTTL . They are specified in compliance w ith JEDEC standard no.7A.


    OCR Scan     		74HC/HCT112 HCT112 HCT-112 74HC 74HCT S0 1J PDF

    HCT-112

    Abstract: IN74ACT112N IN74ACT112D
    Text: IN74ACT112 DUAL J-K FLIP-FLOP WITH SET AND RESET High-Speed Silicon-Gate CMOS • • • • The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS


    Original     		IN74ACT112 IN74ACT112 LS/ALS112, HC/HCT112. IN74ACT112N IN74ACT112D HCT-112 PDF

    IN74ACT112N

    Abstract: IN74ACT112D
    Text: TECHNICAL DATA IN74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.


    Original     		IN74ACT112 IN74ACT112 LS/ALS112, HC/HCT112. IN74ACT112N IN74ACT112D PDF

    IN74AC112N

    Abstract: IN74AC112 IN74AC112D
    Text: TECHNICAL DATA IN74AC112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC112 is identical in pinout to the LS/ALS112, HC/HCT112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS


    Original     		IN74AC112 IN74AC112 LS/ALS112, HC/HCT112. IN74AC112N IN74AC112D PDF

    MAX232

    Abstract: No abstract text available
    Text: 74HC/HCT112 flip-flops DUAL JK FLIP-FLOP WITH SET AND RESET; NEGATIVE-EDGE TRIGGER FEATURES • • • TYPICAL Asynchronous set and reset Output capability: standard l£ £ category: flip-flops GENERAL DESCRIPTION ic p 1K JT u IT HCT 17 15 18 19 15 19 tP H l/


    OCR Scan     		74HC/HCT112 MAX232 PDF

    IC06 74HC/HCT/HCU/HCMOS Logic Package Information

    Abstract: 74HC112D 74HC112DB 74HC112N 74HC112PW 74HCT112D 74HCT112DB 74HCT112N w 20 nk 50 z supersedes data of december 1990
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT112


    Original     		74HC/HCT/HCU/HCMOS 74HC/HCT112 IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC112D 74HC112DB 74HC112N 74HC112PW 74HCT112D 74HCT112DB 74HCT112N w 20 nk 50 z supersedes data of december 1990 PDF

    IC 74HC112

    Abstract: 74HC112
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54/74HC112, CD54/HCT112 Data sheet acquired from Harris Semiconductor SCHS141A Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2000


    Original     		CD54/74HC112, CD54/74HCT112 SCHS141A HC112 HCT112 loSZZU001B, SDYU001N, SCET004, SCAU001A, CD74HC112E IC 74HC112 74HC112 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 wiD54HC112, PDF

    NSP 233

    Abstract: D15114
    Text: 74HC/HC T112 flip-flops DUAL JK FLIP-FLOP W ITH SET AND RESET; NEGATIVE-EDGE TRIGGER FEATURES TYPICAL • Asynchronous set and reset • Output capability: standard • IQ0 category: flip-flops PARAMETER SYMBOL U NIT CONDITIONS HC HCT 17 15 18 19 15 19 ns


    OCR Scan     		74HC/HC 74HC/HCT112 NSP 233 D15114 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		HC112 HCT11 CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 PDF

    CD54HC112

    Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		HC112 HCT11 CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 CD54HC112 CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112 PDF

    HCT76

    Abstract: T112 74HCT MM54HCT112 MM54HCT76 MM74HCT112 MM74HCT76 n-sb3
    Text: MM54HCT76 MM74HCT76 HCT112 HCT112 Dual J-K Flip-Flops with Preset and Clear General Description These flip-flops utilize advanced silicon-gate CMOS technology They have input threshold and output drive similar to LS-TTL with the low standby power of CMOS


    Original     		MM54HCT76 MM74HCT76 MM54HCT112 MM74HCT112 MM54HCT MM74HCT HCT76 T112 74HCT MM74HCT112 MM74HCT76 n-sb3 PDF

    BPW22A

    Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
    Text: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey


    OCR Scan     		BS9000, D3007 HE4000B 80RIBUTION BS9000 BPW22A cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		HC112 HCT11 CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, HCT112, HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 SCHS141H HC112 HCT112 PDF