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    HC107

    Abstract: LS73 MC74HC73AN MC74HC73
    Contextual Info: MC74HC73A Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip−flop is negative−edge clocked and has an active−low


    Original     		MC74HC73A MC74HC73A HC107, PDIP-14 MC74HC73/D HC107 LS73 MC74HC73AN MC74HC73 PDF

    Contextual Info: MC74HC73A Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip−flop is negative−edge clocked and has an active−low


    Original     		MC74HC73A HC107, SOIC-14 TSSOP-14 HC73AG MC74HC73/D PDF

    Contextual Info: MC74HC73A Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip−flop is negative−edge clocked and has an active−low


    Original     		MC74HC73A MC74HC73A HC107, MC74HC73/D PDF