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    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36E-333/300/250/200/167 72Mb SigmaDDR-II Burst of 2 SRAM • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write x36 and x18 and Nybble Write (x8) function


    Original
    PDF GS8662T08/09/18/36E-333/300/250/200/167 165-Bump 144Mb 165-bump,

    Untitled

    Abstract: No abstract text available
    Text: GS8662T07/10/19/37BD-450/400/350/333/300 72Mb SigmaDDR-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 450 MHz–300 MHz 1.8 V VDD 1.8 V or 1.5 V I/O Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus


    Original
    PDF GS8662T07/10/19/37BD-450/400/350/333/300 165-Bump 165-bump, GS8662TxxBD-333T. GS8662Txx AN1021

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36E-333/300/250/200/167 72Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    PDF GS8662T08/09/18/36E-333/300/250/200/167 165-Bump 144Mb GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: GS8662T19/37AE-400/375/333/300 72Mb SigmaCIO DDR-II+ Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus


    Original
    PDF GS8662T19/37AE-400/375/333/300 165-Bump GS8662TxxAE-300T. GS8662TxxAE

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36E-333/300/250/200/167 72Mb SigmaDDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface


    Original
    PDF GS8662T08/09/18/36E-333/300/250/200/167 165-Bump 144Mb 165-bump, GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    PDF GS8662T08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, 72Mcumentation AN1021

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T08/09/18/36E-333/300/267/250/200/167 72Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus


    Original
    PDF 8662T08/09/18/36E-333/300/267/250/200/167 165-Bump 144Mb 165-bump, packa/267/250/200/167 GS8662Txx

    mhz300

    Abstract: No abstract text available
    Text: GS8662T07/10/19/37BD-450/400/350/333/300 72Mb SigmaDDR-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 450 MHz–300 MHz 1.8 V VDD 1.8 V or 1.5 V I/O Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus


    Original
    PDF GS8662T07/10/19/37BD-450/400/350/333/300 165-Bump 165-bump, GS8662TxxBD-333T. GS8662Txx mhz300

    Untitled

    Abstract: No abstract text available
    Text: GS8662T07/10/19/37BD-450/400/350/333/300 72Mb SigmaDDR-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    PDF GS8662T07/10/19/37BD-450/400/350/333/300 165-Bump GS8662TxxBD-333T. GS8662Txx AN1021

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T08/09/18/36E-333/300/267*/250/200/167 72Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus


    Original
    PDF GS8662T08/09/18/36E-333/300/267 165-Bump 165-bump, GS866x36E-300T. GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T07/10/19/37BD-450/400/375/333 72Mb SigmaDDR-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 450 MHz–333 MHz 1.8 V VDD 1.8 V or 1.5 V I/O Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaDDR Interface


    Original
    PDF GS8662T07/10/19/37BD-450/400/375/333 165-Bump 165-bump, GS8662TxxBD-333T. GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface


    Original
    PDF GS8662T08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, 72M/250 AN1021

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36E-250/200/167 72Mb SigmaDDR-II Burst of 2 SRAM • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write x36 and x18 and Nybble Write (x8) function


    Original
    PDF GS8662T08/09/18/36E-250/200/167 165-Bump 144Mb 165-bump,

    AN1019

    Abstract: No abstract text available
    Text: AN1019 SigmaQuad-II+ and SigmaDDR-II+ On-Die Termination ODT Introduction When an electrical signal is transmitted along a transmission line, it is reflected back when it reaches the end of the line. That reflection induces noise which adversely affects the quality of the signal, thereby making it more difficult for the receiving device


    Original
    PDF AN1019 AN1019

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T08/09/18/36E-333/300/267/250/200/167 72Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus


    Original
    PDF 8662T08/09/18/36E-333/300/267/250/200/167 165-Bump 144Mb 165-bump, GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36BD-350M 165-Bump BGA Military Temp 72Mb SigmaDDR-IITM Burst of 2 SRAM Features • Military Temperature Range • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface


    Original
    PDF GS8662T08/09/18/36BD-350M 165-Bump 165-bump, GS8662T36BD-300MT. GS8662TxxB-350M

    Untitled

    Abstract: No abstract text available
    Text: GS8662T07/10/19/37BD-450/400/350/333/300 72Mb SigmaDDR-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    PDF GS8662T07/10/19/37BD-450/400/350/333/300 165-Bump GS8662TxxBD-333T. GS8662Txx AN1021

    GS8662T18BD

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface


    Original
    PDF GS8662T08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, pa662T08/09/18/36BD-400/350/333/300/250 AN1021 GS8662T18BD

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface


    Original
    PDF GS8662T08/09/18/36BD-400/350/333/300/250 165-Bump 165-bump, AN1021

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T07/10/19/37BD-450/400/350/333/300 72Mb SigmaDDR-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 450 MHz–300 MHz 1.8 V VDD 1.8 V or 1.5 V I/O Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaDDR Interface


    Original
    PDF GS8662T07/10/19/37BD-450/400/350/333/300 165-Bump GS8662TxxBD-333T. GS8662Txx

    GS8662T18BD-250

    Abstract: GS8662T18BGD-250
    Text: Preliminary GS8662T08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus


    Original
    PDF GS8662T08/09/18/36BD-400/350/333/300/250 165-Bump GS8662T18BD-250 GS8662T18BGD-250

    Untitled

    Abstract: No abstract text available
    Text: GS8662T08/09/18/36E-333/300/250/200/167 72Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    PDF GS8662T08/09/18/36E-333/300/250/200/167 165-Bump 144Mb GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T08/09/18/36E-333/300/267*/250/200/167 72Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus


    Original
    PDF GS8662T08/09/18/36E-333/300/267 165-Bump an866x36E-300T. GS8662Txx

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8662T20/38AE-450/400/375/333/300 72Mb SigmaCIO DDR-II+ Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 450 MHz–300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • 2.5 Clock Latency • Simultaneous Read and Write SigmaCIO Interface


    Original
    PDF GS8662T20/38AE-450/400/375/333/300 165-Bump 144Mb 165-bump, 165-bum GS8662TxxAE-300T. GS8662TxxAE