GS8662RXX Search Results

Contextual Info: Preliminary GS8662R08/09/18/36BD-333/300/250/200/167 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus

Contextual Info: GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: Preliminary GS8662R08/09/18/36E-333/300/250/200/167 72Mb SigmaCIO DDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus

Contextual Info: GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: Preliminary GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus

Contextual Info: GS8662R08/09/18/36E-333/300/250/200/167 72Mb SigmaCIO DDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8662R08/09/18/36E-333/300/250/200/167 72Mb SigmaCIO DDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus

Contextual Info: GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package

Contextual Info: GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package

Contextual Info: GS8662R08/09/18/36E-333/300/250/200/167 72Mb SigmaCIO DDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package

Contextual Info: GS8662R08/09/18/36E-250/200/167 72Mb SigmaDDR-II Burst of 4 SRAM • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write x36 and x18 and Nybble Write (x8) function

Contextual Info: GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: Preliminary GS8662R08/09/18/36BD-400/350/333/300/250 72Mb SigmaDDR-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR Interface • Common I/O bus

Contextual Info: GS8662R08/09/18/36E-333/300/250/200/167 72Mb SigmaDDR-II Burst of 4 SRAM • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write x36 and x18 and Nybble Write (x8) function

Contextual Info: GS8662R08/09/18/36E-333/300/250/200/167 72Mb SigmaDDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface