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    FLOATING POINT HANDLING Search Results

    FLOATING POINT HANDLING Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DFE2016CKA-1R0M=P2 Murata Manufacturing Co Ltd Fixed IND 1uH 1800mA NONAUTO Visit Murata Manufacturing Co Ltd
    LQW18CN55NJ0HD Murata Manufacturing Co Ltd Fixed IND 55nH 1500mA POWRTRN Visit Murata Manufacturing Co Ltd
    LQW18CNR56J0HD Murata Manufacturing Co Ltd Fixed IND 560nH 450mA POWRTRN Visit Murata Manufacturing Co Ltd
    DFE322520F-2R2M=P2 Murata Manufacturing Co Ltd Fixed IND 2.2uH 4400mA NONAUTO Visit Murata Manufacturing Co Ltd
    LQW18CN4N9D0HD Murata Manufacturing Co Ltd Fixed IND 4.9nH 2600mA POWRTRN Visit Murata Manufacturing Co Ltd

    FLOATING POINT HANDLING Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    80960MC

    Abstract: C90FDAA2
    Text: Floating-Point Operation 7 CHAPTER 7 FLOATING-POINT OPERATION This chapter describes the floating-point processing capabilities of the 80960MC processor. The subjects discussed include the real number data types, the execution environment for floating-point operations, the floating-point instructions, and fault and exception handling.


    OCR Scan     		80960MC C90FDAA2 PDF

    80960SB

    Abstract: No abstract text available
    Text: Floating-Point Instructions 1Q CHAPTER 10 FLOATING-POINT INSTRUCTIONS This chapter describes the floating-point processing capabilities of the 80960SB processor. The subjects discussed include the real number data types, the execution environment for floating-point operations, the floating-point instructions, and fault and exception handling.


    OCR Scan     		80960SB PDF

    i960TM

    Abstract: 400921FB
    Text: Floating-Point Operation 7 CHAPTER 7 FLOATING-POINT OPERATION This chapter describes the floating-point processing capabilities o f the i960 MC processor. The subjects discussed include the real number data types, the execution environment for floating-point operations, the floating-point instructions and fault and exception handling.


    OCR Scan     		PDF

    R3000A

    Abstract: functional diagram of ALU R3010A block alu IDT79R3081 R3081 2873 R3010A Integrated Device Technology CFC-1
    Text: R3010A Core RISC FLOATING POINT ACCELERATOR FPA CORE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Hardware support of single- and double-precision operations: — Floating-Point Add — Floating-Point Subtract — Floating-Point Multiply


    Original     		R3010A 50MHz R3000A 64-bit 32-bit R3010A functional diagram of ALU block alu IDT79R3081 R3081 2873 R3010A Integrated Device Technology CFC-1 PDF

    Untitled

    Abstract: No abstract text available
    Text: in te l CHAPTER 7 FLOATING-POINT UNIT The Intel Architecture Floating-Point Unit FPU provides high-performance floating-point processing capabilities. It supports the real, integer, and BCD-integer data types and the floating­ point processing algorithms and exception handling architecture defined in the IEEE 754 and


    OCR Scan     		01fl070fl PDF

    tms390

    Abstract: L64811 L64814 TMS390C sun sparc pinout
    Text: LSI LOGIC L64814 Floating-Point Unit FPU Preliminary Description The L64814 Floating-Point Unit (FPU) is a highperformance, CMOS implementation of the SPARC (Scalable Processor ARChitecture) FPU. The FPU combines a floating-point controller w ith a high-throughput floating-point processor


    OCR Scan     		L64814 tms390 L64811 TMS390C sun sparc pinout PDF

    D-10

    Abstract: D-12 D-16 DSP96002 3F800000 DSP96002 APPLICATIONS DSP96002 fft
    Text: APPENDIX D D.1 FLOATING-POINT NUMBER STORAGE AND ARITHMETIC D.1.1 General The IEEE standard for binary floating point arithmetic provides for the compatibility of floating-point numbers across all implementations which use the standard by defining bit-level encoding of floating-point numbers.


    Original     		32-bit DSP96002 D-10 D-12 D-16 3F800000 DSP96002 APPLICATIONS DSP96002 fft PDF

    C-15

    Abstract: C-16 DSP96002 DSP96002 fft
    Text: APPENDIX C IEEE ARITHMETIC C.1 FLOATING-POINT NUMBER STORAGE AND ARITHMETIC C.1.1 General The IEEE standard for binary floating point arithmetic provides for the compatibility of floating-point numbers across all implementations which use the standard by defining bit-level encoding of floating-point numbers.


    Original     		32-bit DSP96002 C-15 C-16 DSP96002 fft PDF

    TMS34082

    Abstract: CID20 TMS34082A TMS34082B-40 MSA15-0 TMS34020 emulator
    Text: TMS34082A, TMS34082B GRAPHICS FLOATING-POINT PROCESSOR SCGS001A - D315Q, SEPTEMBER 1988 - REVISED SEPTEMBER 1992 • High-Performance Floating-Point RISC Processor Optimized for Graphics • TWo Operating Modes - Floating-Point Coprocessor for TMS34020 Graphics System Processor


    OCR Scan     		TMS34082A, TMS34082B SCGS001A D315Q, TMS34020 TMS34082 TMS34082A-40, TMS34082B-40 CID20 TMS34082A MSA15-0 TMS34020 emulator PDF

    am29325

    Abstract: H-14 AM29325GC WF023740 ScansUX970 TB000640
    Text: Am29325 32-Bit Floating-Point Processor • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products, Newton-Raphson division


    OCR Scan     		Am29325 32-Bit 32-bit, 16-bit WF023790 WF023800 WF023810 16-Bit, H-14 AM29325GC WF023740 ScansUX970 TB000640 PDF

    DSP-3201

    Abstract: No abstract text available
    Text: ANALOG DEVICES 32-Bit IEEE Floating-Point Chipset ADSP-3201/ADSP-3202 FEATURES Complete Chipset Implementing Floating-Point Arithmetic Fully Compatible with IEEE Standard 754 Arithmetic Operations on Three Data Formats: 32-Bit Single-Precision Floating Point


    OCR Scan     		32-Bit ADSP-3211 ADSP-3221 240ns 750mW 144-Lead OOUT31 DSP-3201 PDF

    intel 8087 architecture

    Abstract: sahf instruction intel 8086 Arithmetic and Logic Unit -ALU 8087 coprocessor architecture 8086 instruction set 8086 opcode sheet free binary numbers multiplication 8088 instruction set intel 8086 opcode sheet procedure for converting to opcodes in 8086
    Text: Floating-Point Unit 31 The Intel Architecture Floating-Point Unit FPU provides high-performance floating-point processing capabilities. It supports the real, integer, and BCD-integer data types and the floatingpoint processing algorithms and exception handling architecture defined in the IEEE 754 and 854


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: NOV 2 i « # 1 Am29C325 CMOS 32-Bit Floating-Point Processor > 3 DISTINCTIVE CHARACTERISTICS Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle


    OCR Scan     		Am29C325 32-Bit 32-bit, 16-bit Am29325 PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 375/456-MHz C674x PDF

    DDR2 sdram pcb layout guidelines

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) DDR2 sdram pcb layout guidelines PDF

    MC68020 Minimum System Configuration

    Abstract: MC68882 MC68881 M68000 64 pin MC68020 M68000 MC68000 MC68008 MC68010 MC68030
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC68882 Technical Sum m ary HCMOS Enhanced Floating-Point Coprocessor The MC68882 floating-point coprocessor fully implements the IEEE Standard for Binary Floating-Point A rithm etic 754 for use with the Motorola M68000


    OCR Scan     		MC68882 MC68882 M68000 MC68881, MC68881. MC68020/MC68030 32-bit 68-LEAD MC68020 Minimum System Configuration MC68881 M68000 64 pin MC68020 MC68000 MC68008 MC68010 MC68030 PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) PDF

    0.5-4B

    Abstract: 2322 156 239 sprufe8
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) 0.5-4B 2322 156 239 sprufe8 PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) PDF

    Am29325

    Abstract: H-14
    Text: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle


    OCR Scan     		Am29C325 32-Bit 32-bit, 16-bit Am29325 H-14 PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 375/456-MHz C674x PDF

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) PDF

    PD102

    Abstract: ncl 039 Am29C325 Am29325 AM29C33 pin diagram of amd am2 processor th02 H-14 AM27S43 Am29CPL14
    Text: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle


    OCR Scan     		Am29C325 32-Bit 32-bit, 16-bit Am29325 PD102 ncl 039 AM29C33 pin diagram of amd am2 processor th02 H-14 AM27S43 Am29CPL14 PDF

    SPRS591C

    Abstract: 8038 ic tester circuit diagram RTC A250
    Text: TMS320C6746 SPRS591C – NOVEMBER 2009 – REVISED OCTOBER 2011 www.ti.com TMS320C6746 Fixed/Floating-Point DSP Check for Samples: TMS320C6746 1 TMS320C6746 Fixed/Floating-Point DSP 1.1 Features 12 • Highlights – 375/456-MHz C674x Fixed/Floating-Point


    Original     		TMS320C6746 SPRS591C TMS320C6746 32-/40-Bit) 32-Bit Precision/32-Bit) Precision/64-Bit) SPRS591C 8038 ic tester circuit diagram RTC A250 PDF