Untitled
Abstract: No abstract text available
Text: 54ACT534 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs Literature Number: SNOS108 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs General Description The ’ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop
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54ACT534
54ACT534
SNOS108
ACT534
ACT374
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ECL 10131
Abstract: signetics 10131 10131dc 10131N 10131F 25CC C30C62
Text: S ignetics 10131 Flip-Flop Dual D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 10131 is a Dual Master-Slave Flip Flop. Each flip-flop can be clocked sepa rately by holding the common Clock in the LOW state and using the Clock
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10131N
10131F
1110mV
ECL 10131
signetics 10131
10131dc
10131N
10131F
25CC
C30C62
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54AC175
Abstract: No abstract text available
Text: 54AC175,54ACT175 54AC175, 54ACT175 Quad D Flip-Flop Literature Number: SNOS094A July 29, 2011 54AC175 • 54ACT175 Quad D Flip-Flop General Description Features The 'AC/'ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and
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54AC175
54ACT175
54AC175,
54ACT175
SNOS094A
54AC175
ACT175
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T74LS74
Abstract: T54LS74AD2
Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q
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T54LS/T74LS74A
T74LS74
T54LS74AD2
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T74LS74AB1
Abstract: T74LS74a T54LS74AD2 T74LS74
Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q
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T54LS/T74LS74A
T74LS74AB1
T74LS74a
T54LS74AD2
T74LS74
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54AC374
Abstract: No abstract text available
Text: 54AC374,54ACT374 54AC374 54ACT374 Octal D Flip-Flop with TRI-STATE Outputs Literature Number: SNOS105 54AC374 • 54ACT374 Octal D Flip-Flop with TRI-STATE Outputs General Description The ’AC/’ACT374 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop
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54AC374
54ACT374
54ACT374
SNOS105
54AC374
ACT374
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Untitled
Abstract: No abstract text available
Text: 54FCT374 54FCT374 Octal D-Type Flip-Flop with -TRISTATE Outputs Literature Number: SNOS428 54FCT374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for
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54FCT374
54FCT374
SNOS428
FCT374
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74F175
Abstract: 54f175dm
Text: 54F175,74F175 54F175 74F175 Quad D Flip-Flop Literature Number: SNOS163A 54F 74F175 Quad D Flip-Flop General Description Features The ’F175 is a high-speed quad D flip-flop The device is useful for general flip-flop requirements where clock and clear inputs are common The information on the D inputs is
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54F175
74F175
74F175
SNOS163A
74F175PC/clocks
54f175dm
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SN74LS74AM
Abstract: SN74LS74A SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25
Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q
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SN74LS74A
SN74LS74A
r14525
SN74LS74A/D
SN74LS74AM
SN74LS74AD
SN74LS74ADR2
SN74LS74AMEL
SN74LS74AN
typ25
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Untitled
Abstract: No abstract text available
Text: 54F534,74F534 54F534 74F534 Octal D-Type Flip-Flop with TRI-STATE RM Outputs Literature Number: SNOS201A 54F 74F534 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F534 is a high speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and
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54F534
74F534
74F534
SNOS201A
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Untitled
Abstract: No abstract text available
Text: 54F374 54F374 Octal D-Type Flip-Flop with TRI-STATE RM Outputs Literature Number: SNOS190 54F 74F374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F374 is a high-speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and
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54F374
54F374
SNOS190
74F374
74F374PC
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ECL 100151
Abstract: 100151 PM710 100151F 100151Y
Text: Signetics 100151 Flip-Flop Hex D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 100151 contains six flip-flops with complement and data outputs, a master reset MR and a pair of common clock inputs. Data enter the flip-flop on the
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137mA
100151F
100151Y
740mVp-p
500ns
ECL 100151
100151
PM710
100151F
100151Y
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SN74LS74AN
Abstract: SN74LS74A SN74LS74AD
Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q
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SN74LS74A
SN74LS74A
r14153
SN74LS74A/D
SN74LS74AN
SN74LS74AD
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74AC175
Abstract: No abstract text available
Text: MOTOROLA m M C 74A C 175 M C 74A C T175 Quad D Flip-Flop W ith M aster R eset QUAD D FLIP-FLOP WITH MASTER RESET The MC74AC/ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The
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MC74AC/ACT175
C74AC/ACJ175
74AC175
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74ls175
Abstract: 74ls175 pin diagram 74LS175 TTL LS175 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Text: SN54/74LS175 QUAD D FLIP-FLOP The LSTTL / MSI SN54 / 74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop
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SN54/74LS175
74LS175
LS175
74ls175 pin diagram
74LS175 TTL
SN54LSXXXJ
SN74LSXXXD
SN74LSXXXN
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Untitled
Abstract: No abstract text available
Text: M MOTOROLA M ilitary 54LS74A Dual D -iype Flip-Flop With Clear and Preset ELECTRICALLY TESTED PER: MIL-M-38510/30102 H T h e 54LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high-speed D-type flip-flops. Each flip-flop has
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54LS74A
MIL-M-38510/30102
54LS74A
JM38510/30102BXA
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Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UTC4013 Preliminary CMOS IC DAUL D-TYPE FLIP-FLOP DESCRIPTION The UTC4013 is a dual D-type flip-flop which has two independent circuits and each flip-flop features independent data, set, reset, and clock inputs and outputs. The input level
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UTC4013
UTC4013
QW-R502-543
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74ls74a
Abstract: 751A-02
Text: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.
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SN54/74LS74A
74LS74A
751A-02
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74LS74A
Abstract: 751A-02
Text: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.
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SN54/74LS74A
74LS74A
751A-02
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DM74ALS174N
Abstract: 74ALS175 DM74ALS174 DM74ALS174M DM74ALS174SJ DM74ALS175 DM74ALS175M M16A M16D N16A
Text: DM74ALS174 DM74ALS175 Hex Quad D Flip-Flop with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic Both have an asynchronous clear input and the quad 175 version features complementary outputs from each flip-flop
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DM74ALS174
DM74ALS175
DM74ALS174N
74ALS175
DM74ALS174M
DM74ALS174SJ
DM74ALS175
DM74ALS175M
M16A
M16D
N16A
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Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UTC4013 Preliminary CMOS IC DAUL D-TYPE FLIP-FLOP DESCRIPTION The UTC4013 is a dual D-type flip-flop which has two independent circuits and each flip-flop features independent data, set, reset, and clock inputs and outputs. The input level
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UTC4013
UTC4013
QW-R502-543
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5d211
Abstract: No abstract text available
Text: Signetics 54F74 Flip-Flop Dual D-Type Flip-Flop Product Specification Military Logic Products DESCRIPTION The 54F74 is a dual positive edge-triggered D-type flip-flop featuring individual Data, Clock, Set and Reset inputs, and complementary Q and O outputs.
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54F74
54F74
500ns
5d211
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motorola 5331
Abstract: 74ls175 pin diagram 74LS175 LS175 SN54LSXXXJ SN74LSXXXD SN74LSXXXN motorola ttl
Text: SN54/74LS175 QUAD D FLIP-FLOP The LSTTL / MSI SN54 / 74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop
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SN54/74LS175
74LS175
LS175
motorola 5331
74ls175 pin diagram
SN54LSXXXJ
SN74LSXXXD
SN74LSXXXN
motorola ttl
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74ACT534
Abstract: 74ACT534SC 74ACT534SJ ACT374 M20D MS-013
Text: 74ACT534 Octal D-Type Flip-Flop with 3-STATE Outputs tm Features General Description • ICC and IOZ reduced by 50% ■ Edge-triggered D-type inputs The ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop
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74ACT534
ACT534
ACT374
ACT374
74ACT534
74ACT534SC
74ACT534SJ
M20D
MS-013
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