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    FLIP FLOP CIRCUIT Search Results

    FLIP FLOP CIRCUIT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TLP2701 Toshiba Electronic Devices & Storage Corporation Photocoupler (photo-IC output), 5000 Vrms, 4pin SO6L Visit Toshiba Electronic Devices & Storage Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    TCKE800NA Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Auto-retry, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE800NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, WSON10B Visit Toshiba Electronic Devices & Storage Corporation

    FLIP FLOP CIRCUIT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CD40174BC,CD40174BM,CD40175BC,CD40175BM CD40174BM CD40174BC Hex D Flip-Flop CD40175BM CD40175BC Quad D Flip-Flop Literature Number: SNOS358A CD40174BM CD40174BC Hex D Flip-Flop CD40175BM CD40175BC Quad D Flip-Flop General Description All inputs are protected from static discharge by diode


    Original     		PDF CD40174BC CD40174BM CD40175BC CD40175BM CD40175BM SNOS358A

    SN74LS74AM

    Abstract: SN74LS74A SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25
    Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q


    Original     		PDF SN74LS74A SN74LS74A r14525 SN74LS74A/D SN74LS74AM SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25

    SN74LS74AN

    Abstract: SN74LS74A SN74LS74AD
    Text: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q


    Original     		PDF SN74LS74A SN74LS74A r14153 SN74LS74A/D SN74LS74AN SN74LS74AD

    Untitled

    Abstract: No abstract text available
    Text: 54ACT534 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs Literature Number: SNOS108 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs General Description The ’ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop


    Original     		PDF 54ACT534 54ACT534 SNOS108 ACT534 ACT374

    74ls74a

    Abstract: 751A-02
    Text: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.


    Original     		PDF SN54/74LS74A 74LS74A 751A-02

    74LS74A

    Abstract: 751A-02
    Text: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.


    Original     		PDF SN54/74LS74A 74LS74A 751A-02

    DM74ALS174N

    Abstract: 74ALS175 DM74ALS174 DM74ALS174M DM74ALS174SJ DM74ALS175 DM74ALS175M M16A M16D N16A
    Text: DM74ALS174 DM74ALS175 Hex Quad D Flip-Flop with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic Both have an asynchronous clear input and the quad 175 version features complementary outputs from each flip-flop


    Original     		PDF DM74ALS174 DM74ALS175 DM74ALS174N 74ALS175 DM74ALS174M DM74ALS174SJ DM74ALS175 DM74ALS175M M16A M16D N16A

    54AC175

    Abstract: No abstract text available
    Text: 54AC175,54ACT175 54AC175, 54ACT175 Quad D Flip-Flop Literature Number: SNOS094A July 29, 2011 54AC175 • 54ACT175 Quad D Flip-Flop General Description Features The 'AC/'ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and


    Original     		PDF 54AC175 54ACT175 54AC175, 54ACT175 SNOS094A 54AC175 ACT175

    MM74C74N

    Abstract: AN-90 M14A MM74C74 MM74C74M MS-001 N14A
    Text: Revised January 1999 MM74C74 Dual D-Type Flip-Flop General Description • High noise immunity: The MM74C74 dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop


    Original     		PDF MM74C74 MM74C74 MM74C74N AN-90 M14A MM74C74M MS-001 N14A

    DM74174

    Abstract: MS-001 N16E
    Text: DM74174 Hex/Quad D-Type Flip-Flop with Clear September 1986 Revised July 2001 DM74174 Hex/Quad D-Type Flip-Flop with Clear General Description Features These positive-edge triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear


    Original     		PDF DM74174 DM74174 MS-001 N16E

    MC14174

    Abstract: No abstract text available
    Text: CD40174BC Hex D-Type Flip-Flop October 1987 Revised January 2004 CD40174BC Hex D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available.


    Original     		PDF CD40174BC MC14174

    CD40xx

    Abstract: CD40174B CD40174BC CD40174BM CD40175B CD40175BC CD40175BM MC14174B MC14175B MM74C174
    Text: CD40174BM CD40174BC Hex D Flip-Flop CD40175BM CD40175BC Quad D Flip-Flop General Description The CD40174B consists of six positive-edge triggered D-type flip-flops the true outputs from each flip-flop are externally available The CD40175B consists of four positiveedge triggered D-type flip-flops both the true and complement outputs from each flip-flop are externally available


    Original     		PDF CD40174BM CD40174BC CD40175BM CD40175BC CD40174B CD40175B CD40xx MC14174B MC14175B MM74C174

    Untitled

    Abstract: No abstract text available
    Text: MM54C173,MM74C173 MM54C173 MM74C173 TRI-STATE Quad D Flip-Flop Literature Number: SNOS324A MM54C173 MM74C173 TRI-STATE Quad D Flip-Flop General Description Features The MM54C173 MM74C173 TRI-STATE quad D flip-flop is a monolithic complementary MOS CMOS integrated circuit


    Original     		PDF MM54C173 MM74C173 MM74C173 SNOS324A

    CD40174BC

    Abstract: CD40174BCM CD40174BCN CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175
    Text: Revised January 1999 CD40174BC • CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.


    Original     		PDF CD40174BC CD40175BC CD40174BC CD40175BC CD40174BCM CD40174BCN CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175

    Untitled

    Abstract: No abstract text available
    Text: 54FCT374 54FCT374 Octal D-Type Flip-Flop with -TRISTATE Outputs Literature Number: SNOS428 54FCT374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for


    Original     		PDF 54FCT374 54FCT374 SNOS428 FCT374

    74F175

    Abstract: 54f175dm
    Text: 54F175,74F175 54F175 74F175 Quad D Flip-Flop Literature Number: SNOS163A 54F 74F175 Quad D Flip-Flop General Description Features The ’F175 is a high-speed quad D flip-flop The device is useful for general flip-flop requirements where clock and clear inputs are common The information on the D inputs is


    Original     		PDF 54F175 74F175 74F175 SNOS163A 74F175PC/clocks 54f175dm

    CD40175

    Abstract: CD40174BC CD40174BCM CD40174BCN CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174
    Text: Revised March 2002 CD40174BC • CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.


    Original     		PDF CD40174BC CD40175BC CD40174BC CD40175BC CD40175 CD40174BCM CD40174BCN CD40175BCM CD40175BCN MC14174B MC14175B MM74C174

    Untitled

    Abstract: No abstract text available
    Text: 54F534,74F534 54F534 74F534 Octal D-Type Flip-Flop with TRI-STATE RM Outputs Literature Number: SNOS201A 54F 74F534 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F534 is a high speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and


    Original     		PDF 54F534 74F534 74F534 SNOS201A

    DM74S174N

    Abstract: DM74S174 DM74S175 DM74S175N MS-001 N16E
    Text: Revised April 2000 DM74S174 • DM74S175 Hex/Quad D Flip-Flop with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad DM74S175 versions feature complementary outputs from each flip-flop.


    Original     		PDF DM74S174 DM74S175 DM74S175) DM74S174 DM74S174N DM74S175 DM74S175N MS-001 N16E

    T74LS74

    Abstract: T54LS74AD2
    Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q


    OCR Scan     		PDF T54LS/T74LS74A T74LS74 T54LS74AD2

    T74LS74AB1

    Abstract: T74LS74a T54LS74AD2 T74LS74
    Text: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q


    OCR Scan     		PDF T54LS/T74LS74A T74LS74AB1 T74LS74a T54LS74AD2 T74LS74

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA M ilitary 54LS74A Dual D -iype Flip-Flop With Clear and Preset ELECTRICALLY TESTED PER: MIL-M-38510/30102 H T h e 54LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high-speed D-type flip-flops. Each flip-flop has


    OCR Scan     		PDF 54LS74A MIL-M-38510/30102 54LS74A JM38510/30102BXA

    ECL 10131

    Abstract: signetics 10131 10131dc 10131N 10131F 25CC C30C62
    Text: S ignetics 10131 Flip-Flop Dual D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 10131 is a Dual Master-Slave Flip­ Flop. Each flip-flop can be clocked sepa­ rately by holding the common Clock in the LOW state and using the Clock


    OCR Scan     		PDF 10131N 10131F 1110mV ECL 10131 signetics 10131 10131dc 10131N 10131F 25CC C30C62

    54LS74A

    Abstract: No abstract text available
    Text: M ilita ry 54L S 74A MOTOROLA Dual D-iype Flip-Flop W ith C le ar and P reset ELECTRICALLY TESTED PER: MIL-M-38510/30102 M The 54LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high-speed D-type flip-flops. Each flip-flop has


    OCR Scan     		PDF MIL-M-38510/30102 54LS74A JM38510/30102BXA