Untitled
Abstract: No abstract text available
Text: F100165 Universal Priority Encoder FAIRCHILD A Schlumberger Company F100K ECL Product Description The F100165 contains eight input latches w ith a com m on Enable E follow ed by encoding logic w hich generates the binary address of the highest p rio rity input
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F100165
F100K
24-Pin
F100165
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m3ub
Abstract: F100160
Text: F100160 Dual Parity Checker/Generator FAIRCHILD S c h lu m b e rg e r C o m p a n y A F100K ECL Product Connection Diagrams Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the o utput is HIG H when an even num ber of inputs are HIGH. One of the nine inputs la or
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F100160
F100K
24-Pin
F100160
m3ub
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fairchild ECL
Abstract: ECL Decade Counter F10010 F10016 ECL binary Counter ecl 10016
Text: Fiooic/» FlOOie^ BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable. cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre settable, cascadable 4-Bit Binary Counter. They are m u ltifu n ctio n MSI building
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F10010
F10016
F10010
F10016
fairchild ECL
ECL Decade Counter
ECL binary Counter
ecl 10016
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F100164
Abstract: F100364
Text: 100164 ZWA National mUrn Semiconductor F100164 16-Input Multiplexer General Description The F100164 is a 16-input multiplexer. Data paths are con trolled by four Select lines S0 - S 3 . Their decoding is shown in the truth table. Output data polarity is the same as the
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F100164
16-lnput
F100364
F100164
16-input
24-Pin
TL/F/9865-7
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Untitled
Abstract: No abstract text available
Text: F100164 16-Input Multiplexer F A IR C H IL D A Schlumberger Company F100K ECL Product Connection Diagrams Description The F100164 is a 16-input multiplexer. Data paths are controlled by four Select lines S 0 - S 3 •Their decoding is shown in the truth table. Output data polarity is the
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F100164
16-Input
F100K
I0-I15
24-Pin
F100164
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AABE
Abstract: No abstract text available
Text: F100166 9-Bit Comparator F A IR C H I^ A Schturn berger Company F100K E C L Product Description The F100166 is a 9-bit magnitude comparator which compares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. Other functions can be generated by the
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F100166
F100K
24-Pin
F100166
AABE
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F100163
Abstract: No abstract text available
Text: F100163 DUAL 8-INPUT MULTIPLEXER F100K SER IES ECL DESCRIPTION — The F100163isadual 8-Input Multiplexer. The Data Select Sn inputs determine which bit (An and Bn) will be presented at the Outputs (Z a and Zb respectively). The same bit (0-7) will be selected for both the Z a and Z b output.
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F100163
F100K
F100163isadual
F100163
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F100163
Abstract: No abstract text available
Text: 100163 National Semiconductor F100163 Dual 8-Input Multiplexer General Description The F100163 is a dual 8 -input multiplexer. The Data Select Sn inputs determine which bit (An and Bn) will be present ed at the outputs (Za and Zt, respectively). The same bit
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F100163
F100363
24-Pin
24-Pln
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ITA 6 V 5 B4
Abstract: ca 3140 ic
Text: F100166 9-Bit Comparator FAIRCHILD A Schlumberger Company F100K ECL Product Description The F100166 is a 9-bit m agnitude com parator which com pares the arithm etic value of tw o 9 -b it w ords and indicates w hether one w ord is greater than, or equal to, the other. O ther fu n ction s can be generated by the
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F100166
F100K
24-Pin
F100166
ITA 6 V 5 B4
ca 3140 ic
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Untitled
Abstract: No abstract text available
Text: FAIRCHILD ECL DATASHEET • F10010 • F10016 SWITCHING CIRCUITS AND WAVEFORMS Cont'd Vcc L-) and L2 = equal length 50 Q impedance lines R j = 50 Q termination of scope CL = Jig and stray capacitance <5.0 pF Fig. 2. Decoupling 0.1 ^F from gnd to VEE and Vqq
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F10010
F10016
F10014
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cz bc ic
Abstract: No abstract text available
Text: F100166 9-BIT COMPARATOR F100K SERIES ECL DESCRIPTION - The F100166 is a 9-Bit Magnitude Comparator which compares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to the other. The outputs do not have pull down resistors, which provides the wire OR func
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F100166
F100K
F100166
cz bc ic
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sj 3159
Abstract: No abstract text available
Text: 100164 National ju fl Semiconductor F100164 16-Input Multiplexer General Description Th e F100164 is a 16-input m ultiplexer. D ata paths are co n tro lle d by fo u r S e le ct lines S 0 - S 3 . Their deco d ing is shown in the tru th table. O utput data pola rity is th e sam e as the
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F100164
16-lnput
F100164
16-input
F100364
TL/F/9865-3
24-Pin
l0-l15
TL/F/9865-7
sj 3159
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Untitled
Abstract: No abstract text available
Text: 100160 O T National düiI Semiconductor F100160 Dual Parity Checker/Generator General Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the
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F100160
F100360
TL/F/9863-7
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Untitled
Abstract: No abstract text available
Text: 100160 yw\ National Jum Semiconductor F100160 Dual Parity Checker/Generator General Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or y has the
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F100160
F100360
TL/F/9863-0
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F10010
Abstract: F10016 ECL Handbook F10014
Text: F A IR C H IL D ECL DATA S H E ET • F10010 • F10016 SW ITCHING CIRCUITS AND W AVEFORMS C ont'd Vcc L-j a n d L 2 = e q u a l le n g th 50 Q im p e d a n c e lin e s R j = 50 Q te rm i n a tio n o f s co p e C l = J ig a n d s tra y c a p a c ita n c e < 5 .0 pF
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F10010
F10016
F10014
F10010
F10016
ECL Handbook
F10014
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F100163
Abstract: F100363 F100K
Text: 100363 O T National ÆÂ Semiconductor F100363 Low Power Dual 8-Input Multiplexer General Description Features The F100163 is a dual 8 -input multiplexer. The Data Select <Sn inputs determine which bit An and Bn) will be present ed at the outputs (Za and Z& respectively). The same bit
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F100363
F100163
F100163
24-Pin
TL/F/10612-6
TL/F/10612-7
F100363
F100K
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F100163
Abstract: F100363 B7S2 A4415
Text: F100163 Dual 8-Input Multiplexer General Description The F100163 is a dual 8-input multiplexer. The Data Select Sn inputs determine which bit (An and Bn) will be present ed at the outputs (Za and Zb respectively). The same bit (0 -7 ) will be selected for both the Za and Zb output. All
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F100163
F100163
F100363
TL/F/9864-3
24-Pin
TL/F/9864-6
TL/F/9864-7
B7S2
A4415
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BI223
Abstract: F100166
Text: 100166 National Semiconductor F100166 9-Bit Comparator General Description The F100166 is a 9-bit magnitude comparator which com pares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. Ordering Code:
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F100166
F100166
24-Pin
TL/F/9867-6
BI223
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Untitled
Abstract: No abstract text available
Text: P A I R C H I L F100160 Dual Parity Checker/Generator D F100K ECL Product Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the shorter through-put delay and is therefore
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F100160
F100K
24-Pin
F100160
tpUH80%
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ECL Decade Counter
Abstract: No abstract text available
Text: F10010 • F10016 BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable, cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre settable, cascadable 4-Bit Binary Counter. They are m ultifunction MSI building
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F10010
F10016
F10010
F10016
F0100
F10Q16
ECL Decade Counter
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Untitled
Abstract: No abstract text available
Text: F100160 DUAL PARITY CHECKER/GENERATOR F100K SERIES ECL DESCRIPTION — The F100160 is a Dual Parity Checker/Generator. Each half has nine inputs, with the output being HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the shorter through-put delay and is therefore preferred as the expansion
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F100160
F100K
F100160
Fl00160alsohasa
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100166DC
Abstract: No abstract text available
Text: National éHASemiconductor F100166 9-Bit Comparator General Description The F100166 is a 9-bit magnitude comparator which com pares the arithmetic value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. Other functions can be generated by the wire-OR of the
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F100166
24-Pln
TL/F/9867-6
100166DC
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Untitled
Abstract: No abstract text available
Text: 100165 zw\National á¡A Semiconductor F100165 Universal Priority Encoder General Description The F100165 contains eight input latches with a common Enable E followed by encoding logic which generates the binary address of the highest priority input having a HIGH
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F100165
TL/F/9066-9
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B7S2
Abstract: No abstract text available
Text: F100163 Dual 8-Input Multiplexer FAIRCHILD A Sch lu m b erger C om pany F100K ECL Product Description The F100163 is a dual 8-inp u t m ultiplexer. The Data Select S n inputs determ ine w hich bit (A n and B n ) will be presented at the outputs (Z a and Zb respectively).
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F100163
F100K
24-Pin
F100163
B7S2
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