EDS1216CABH Search Results
EDS1216CABH Datasheets (2)
| Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
|---|---|---|---|---|---|---|
| EDS1216CABH-75-E |
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DRAM Chip: SDRAM: 16MByte: 2.5V Supply: Commercial: FBGA: 54-Pin | Original | |||
| EDS1216CABH-75L-E |
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DRAM Chip: SDRAM: 16MByte: 2.5V Supply: Commercial: FBGA: 54-Pin | Original |
EDS1216CABH Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
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Contextual Info: DATA SHEET 128M bits SDRAM EDS1216AABH, EDS1216CABH 8M words x 16 bits Pin Configurations • Density: 128M bits • Organization 2M words × 16 bits × 4 banks • Package: 54-ball FBGA Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V |
Original |
EDS1216AABH, EDS1216CABH 54-ball 133MHz cycles/64ms M01E0107 E0410E50 | |
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Contextual Info: DATA SHEET 128M bits SDRAM EDS1216AABH, EDS1216CABH 8M words x 16 bits Description Pin Configurations The EDS1216AABH, EDS1216CABH are 128M bits SDRAMs organized as 2,097,152 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. |
Original |
EDS1216AABH, EDS1216CABH EDS1216CABH EDS1216AABH) EDS1216CABH) 54-ball 133MHz M01E0107 | |
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Contextual Info: DATA SHEET 128M bits SDRAM EDS1216AABH, EDS1216CABH 8M words x 16 bits Specifications Pin Configurations • Density: 128M bits • Organization ⎯ 2M words × 16 bits × 4 banks • Package: 54-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V |
Original |
EDS1216AABH, EDS1216CABH 54-ball 133MHz cycles/64ms M01E0107 E0410E50 | |
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Contextual Info: DATA SHEET 128M bits SDRAM EDS1216AABH, EDS1216CABH 8M words x 16 bits Description Pin Configurations The EDS1216AABH, EDS1216CABH are 128M bits SDRAMs organized as 2,097,152 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. |
Original |
EDS1216AABH, EDS1216CABH EDS1216CABH EDS1216AABH) EDS1216CABH) 54-ball 133MHz M01E0107 | |
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Contextual Info: DATA SHEET 128M bits SDRAM EDS1216AABH, EDS1216CABH 8M words x 16 bits Description Pin Configurations The EDS1216AABH, EDS1216CABH are 128M bits SDRAM organized as 2,097,152 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. |
Original |
EDS1216AABH, EDS1216CABH EDS1216CABH EDS1216AABH) EDS1216CABH) 54-ball 133MHz M01E0107 | |
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Contextual Info: PRELIMINARY DATA SHEET 128M bits SDRAM EDS1216AABH, EDS1216CABH 8M words x 16 bits Description Pin Configurations The EDS1216AABH, EDS1216CABH are 128M bits SDRAMs organized as 2,097,152 words × 16 bits × 4 banks. All inputs and outputs are synchronized with |
Original |
EDS1216AABH, EDS1216CABH EDS1216CABH EDS1216AABH) EDS1216CABH) 54-ball 133MHz M01E0107 |