Hitachi PIX-8144
Abstract: Hitachi PIX 8144 Pix-8144 PIX 8144 hitachi 8144 CY7C025-AC dual port 16 SRAM PLCC CY7C024 CY7C0241 CY7C0251
Text: Qualification Report QTP 96091/96393, Version 2.0 September 1996 Dual Port SRAM - R28 Technology, 6% Shrink CY7C0251 8K x 18 Dual Port SRAM CY7C025 8K x 16 Dual Port SRAM CY7C0241 4K x 18 Dual Port SRAM CY7C024 4K x 16 Dual Port SRAM CY7C145 8K x 9 Dual Port SRAM
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CY7C0251
CY7C025
CY7C0241
CY7C024
CY7C145
CY7C144
CY7C139
CY7C138
CY7C133
CY7C143
Hitachi PIX-8144
Hitachi PIX 8144
Pix-8144
PIX 8144
hitachi 8144
CY7C025-AC
dual port 16 SRAM PLCC
CY7C024
CY7C0241
CY7C0251
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dual port SRAM PLCC
Abstract: CY7C133 CY7C138 CY7C139 CY7C143 CY7C144 CY7C145 CY7C016 CY7C024 CY7C0241
Text: Qualification Report May 1996, QTP# 95226, Version 1.0 Dual Port SRAM - R28 Technology Thin Quad Flat Pack Package CY7C0251 8K x 18 Dual Port SRAM CY7C025 8K x 16 Dual Port SRAM CY7C0241 4K x 18 Dual Port SRAM CY7C024 4K x 16 Dual Port SRAM CY7C145 8K x 9 Dual Port SRAM
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CY7C0251
CY7C025
CY7C0241
CY7C024
CY7C145
CY7C144
CY7C139
CY7C138
CY7C133
CY7C143
dual port SRAM PLCC
CY7C133
CY7C138
CY7C139
CY7C143
CY7C144
CY7C145
CY7C016
CY7C024
CY7C0241
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96182
Abstract: 9715 cy7c136
Text: Cypress Semiconductor Qualification Report QTP# 97045/97154 VERSION 1.1 April, 1997 Dual Port SRAM - R28 Technology CY7C130/131 1K x 8 Dual Port SRAM CY7C140/141 1K x 8 Dual Port SRAM CY7C132/136 2K x 8 Dual Port SRAM CY7C142/146 2K x 8 Dual Port SRAM Cypress Semiconductor
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CY7C130/131
CY7C140/141
CY7C132/136
CY7C142/146
CY7C13
/CY7C14*
CY7C136
52-Lead
CY7C025-JC
CY7C025-AC
96182
9715
cy7c136
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CY7C136
Abstract: ablestik 84-1LMISR4 Nitto MP 8000
Text: Cypress Semiconductor Qualification Report QTP# 98482 VERSION 1.0 March, 1999 5V Asynchronous Dual Port SRAM - R28 Technology - Fab 2 CY7C130/131/140/141 1K x 8 Dual Port SRAM CY7C132/136/142/146 2K x 8 Dual Port SRAM CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:
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CY7C130/131/140/141
CY7C132/136/142/146
CY7C13
/CY7C14*
CY7C136
52-Lead
CY7C0251-AC
CY7C136
ablestik 84-1LMISR4
Nitto MP 8000
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7133 A-1
Abstract: AN-91 IDT7024 8K RAM 71421
Text: THE MOST COMMONLY ASKED QUESTIONS ABOUT ASYNCHRONOUS DUAL-PORT SRAMS APPLICATION NOTE AN-91 By Mark Baumann and Cheryl Brennan What is a dual-port SRAM? A dual -port SRAM is exactly what it sounds like. It is a single static SRAM array accessed by two sets of address, data, and control signals.
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AN-91
7133 A-1
AN-91
IDT7024
8K RAM
71421
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7134
Abstract: DUAL-PORT STATIC RAM AN-91 IDT7024 low power asynchronous SRAM 64KX8 3.3V 1Kx8 static ram 71421
Text: THE MOST COMMONLY ASKED QUESTIONS ABOUT ASYNCHRONOUS DUAL-PORT SRAMS APPLICATION NOTE AN-91 By Mark Baumann and Cheryl Brennan What is a dual-port SRAM? A dual -port SRAM is exactly what it sounds like. It is a single static SRAM array accessed by two sets of address, data, and control signals.
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AN-91
7134
DUAL-PORT STATIC RAM
AN-91
IDT7024
low power asynchronous SRAM 64KX8 3.3V
1Kx8 static ram
71421
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CY7C1342
Abstract: CY7C135
Text: CY7C135 CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 4K x 8 organization • 0.65-micron CMOS for optimum speed/power
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CY7C135
CY7C1342
65-micron
7C1342
52-pin
CY7C135
CY7C1342
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Untitled
Abstract: No abstract text available
Text: CY7C135 CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 4K x 8 organization • 0.65-micron CMOS for optimum speed/power
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CY7C135
CY7C1342
65-micron
7C1342
52-pin
CY7C135
CY7C1342
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sem 2005
Abstract: CY7C1342 CY7C135
Text: CY7C135 CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 4K x 8 organization • 0.65-micron CMOS for optimum speed/power
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CY7C135
CY7C1342
65-micron
7C1342
52-pin
CY7C135
CY7C1342
sem 2005
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Untitled
Abstract: No abstract text available
Text: CY7C135, CY7C135A CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 4K x 8 organization ■ 0.65 micron CMOS for optimum speed and power
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CY7C135,
CY7C135A
CY7C1342
CY7C135/135A
CY7C1342
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CYPRESS CROSS REFERENCE dual port sram
Abstract: CY7C1342 CY7C135
Text: CY7C135 CY7C135A CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 4K x 8 organization ■ 0.65 micron CMOS for optimum speed and power
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CY7C135
CY7C135A
CY7C1342
7C1342
52-pin
CY7C135/135A
CY7C1342
CYPRESS CROSS REFERENCE dual port sram
CY7C135
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CYPRESS CROSS REFERENCE dual port sram
Abstract: CY7C1342 CY7C135
Text: CY7C135, CY7C135A CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 4K x 8 organization ■ 0.65 micron CMOS for optimum speed and power
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CY7C135,
CY7C135A
CY7C1342
CY7C135/135A
CY7C1342
CYPRESS CROSS REFERENCE dual port sram
CY7C135
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70V24
Abstract: CY7C024AV
Text: HDV24 ADP II SRAM eo 3.3 Volt x16 Asynchronous Dual-Port Static RAM Memory Configuration Device 4K x 16 HDV24 Key Features: • • • • • • • • • Industry leading Dual-Port Static RAM up to 15ns Simultaneous memory access through two ports
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HDV24
HDV24L15PF
3HD166A
70V24
CY7C024AV
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hd26 pinout
Abstract: sem 2107 A12L A13L J03A HD-26
Text: HD26 ADP II SRAM o 5 Volt x16 Asynchronous Dual-Port Static RAM Memory Configuration Device 16K x 16 HD26 Key Features: • • • • • • • • • • Industry leading Dual-Port Static RAM Low power operation Simultaneous memory access through two ports
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84-pin
HD26L15J
3HD163A
hd26 pinout
sem 2107
A12L
A13L
J03A
HD-26
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Untitled
Abstract: No abstract text available
Text: DUAL PORT RAMS MOSEL offers four Dual Port SRAMs in the 1K, 2K, and 4K x 8 densities. An 8K x 8 Dual Port SRAM is planned as a further extension to the product family. Dual Port SRAM provides two independent ports with separate controls, address and I/O data pins. The Dual Port SRAM can double the data bus bandwidth by permitting independent,
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600mil
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70CMS
Abstract: No abstract text available
Text: MOSEL _ MS61342 PRELIMINARY 4K X 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • High-speed-35/45/55ns The MOSEL MS61342 is a 32,768 bit dual port static random access memory organized as 4,096 words by 8 bits allowing each port to independently access any
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MS61342
High-speed-35/45/55ns
325mW
MS61342
PID074
J52-1
S61342-35JC
S61342-45JC
70CMS
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Untitled
Abstract: No abstract text available
Text: MS61342 FEBRUARY 1992 4K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • The MOSEL MS61342 is a 32,768 bit dual port static random access memory organized as 4,096 words by 8 bits allowing each port to independently access any location in memory. A busy flag provides arbitration
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MS61342
MS61342
52-pin
325mW
61342-45JC
52-Pin
61342I
61342-70JC
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ms6132
Abstract: No abstract text available
Text: MS6132 FEBRUARY 1992 2K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • The MOSEL MS6132 is a 16,384 bit dual port static random access memory organized as 2,048 words by 8 bits allowing each port to independently access any location in memory. A busy flag provides arbitration
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MS6132
MS6132
48-pin
52-pin
PID068A
MS6132-45PC
MS6132-55PC
MS6132-70PC
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Untitled
Abstract: No abstract text available
Text: MS6134 FEBRUARY 1992 4K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • High-speed - 45/55/70 ns • M S6134 — Standalone device • True Dual Port Memory array • Low Power dissipation The M OSEL M S6134 is a 32,768 bit dual port static random access memory organized as 4,096 words by 8
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MS6134
S6134
S6134
capabilit52-1)
PID083A
MS6134-45PC
MS6134-55PC
MS6134-70PC
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LH540203
Abstract: LH5498 H-1025
Text: LH540203 CMOS 2048 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing
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LH540203
LH5498
Am/IDT/MS7203
28-Pin,
300-mil
300-miis0j*
32-Pin
LH540203
32-pin,
H-1025
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Untitled
Abstract: No abstract text available
Text: LH540203 CMOS 2048 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing
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LH540203
LH540203
32-pin,
450-mil
28-pin,
300-mil
DIP28-W-300)
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32PLCC
Abstract: No abstract text available
Text: LH540202 CMOS 1024 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing
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LH540202
LH5497
Am/IDT/MS7202
LH5497H
28-Pin,
300-mil
300-miis0j*
32-Pin
32-pin,
32PLCC
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Untitled
Abstract: No abstract text available
Text: LH540203 CMOS 2048 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing
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LH540203
LH540203
32PLCC
PLCC32-P-R450)
32-pin,
450-mil
28-pin,
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Untitled
Abstract: No abstract text available
Text: LH540202 CMOS 1024 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing
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LH540202
LH540202
32-pin
450-mil
28-pin,
300-mil
DIP28-W-300)
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