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    DQ08 Price and Stock

    Maple Systems Inc IR-DQ08-R

    I/O Module, Digital, 8 Out Relay
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    DigiKey IR-DQ08-R 1
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    RS IR-DQ08-R Bulk 1 1
    • 1 $122
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    Siemens 8PG11141DQ08 (ALTERNATE: 8PG11141DQ08)

    60AT,20X72 FCB Section,480V,65kA,800A H ; 8PG11141DQ08 | Siemens 8PG11141DQ08
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    RS 8PG11141DQ08 (ALTERNATE: 8PG11141DQ08) Bulk 2 Weeks 1
    • 1 $12449.84
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    NJ SEMI 11DQ08

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics 11DQ08 526 7
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    Macronix International Co Ltd MX66L1G45GXDQ-08G

    BGA24A1Gb bits Serial NOR Flash memory Automotive Q Grade Temperature 40C to 125C (Alt: MX66L1G45GXDQ-08G/TRAY)
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    Avnet Silica MX66L1G45GXDQ-08G 14 Weeks 480
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    Macronix International Co Ltd MX25L25645GXDQ-08G

    MCXMX25L25645GXDQ08G 256MB BGA 24BALL (Alt: MX25L25645GXDQ-08G)
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    Avnet Silica MX25L25645GXDQ-08G 24 Weeks 480
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    DQ08 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    HFBR-X41XT

    Abstract: Marking code 44t HEDS-9200 marking 44t HFBR-X41X
    Text: HEWLETT-PACKARD/ CMPNTS blE T> • 4447S6M DQ08762 W hpl HEWLETT ■¿VU PACKARD 5 MBd Low Cost Fiber Optic Receiver Technical Data HFBR-24X2 Series Description The HFBR-24X2 fiber optic receiver is designed to operate with the Hewlett-Packard HFBR-14XX fiber optic


    OCR Scan     		4447S6M DQ08762 HFBR-24X2 HFBR-0400 HFBR-14X2 HFBR-14X4 HFBR-24X4 HFBR-24X6 HFBR-X41XT Marking code 44t HEDS-9200 marking 44t HFBR-X41X PDF

    AS8S512K3

    Abstract: No abstract text available
    Text: ADVANCED iPEM 64 Mb ASYNC SRAM AS8S2M32PEC 64Mb, 2Mx32 CMOS 3.3V, High Speed Static RAM Integrated Plastic Encapsulated Microcircuit FEATURES DESCRIPTION Integrated Real-Time Memory Array Solution No latency or refresh cycles Parallel Read/Write Interface


    Original     		AS8S2M32PEC 2Mx32 M0-47AE AS8S2M32 AS8S2M32PEC AS8S512K3 PDF

    Memory

    Abstract: FTS8L32512V
    Text: FTS8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The FTS8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.


    Original     		FTS8L32512V 512Kx32 FTS8L32512V ADSP-21060L ADSP-21062L TMS320LC31 MPC860 512Kx8, FTI8K32512V Memory PDF

    Untitled

    Abstract: No abstract text available
    Text: IBM041841RLAA IBM043641RLAA Preliminary 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Registered Outputs • CMOS Technolgy • Asynchronous Output Enable and Power Down Inputs • Synchronous Pipeline Mode Of Operation with


    OCR Scan     		IBM041841RLAA IBM043641RLAA GA14-4667-01 PDF

    Untitled

    Abstract: No abstract text available
    Text: •HYUNDAI H Y 6 7 V 1 8 1 0 0 /1 0 1 64K X 18 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst ad­ dress counter and pipelined output. All synchronous inputs pass through registers controlled by a positiveedge triggered clock K .


    OCR Scan     		486/Pentium 7ns/12ns/17ns 67MHz 486/Pent 00DbSS3 1DH02-22-MAY95 HY67V18100/101 HY67V18100C PDF

    Untitled

    Abstract: No abstract text available
    Text: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM FEATURES DESCRIPTION  Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs


    Original     		WEDPY256K72V-XBX 256Kx72 WEDPY256K72V-XBX PDF

    Untitled

    Abstract: No abstract text available
    Text: Mobile 3rd Generation Intel Core Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Datasheet, Volume 1 of 2 June 2013 Document Number: 326768-006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: EDI8F32123C ^ E D I ELECTRONIC DESIGNS, N C .I 128Kx32 Battery Backed SRAM Module ADVANCED Features 128Kx32 bit CMOS Static Random Access Memory with on-board battery backup 128Kx32 Static RAM CMOS, High Speed Module The EDI8F32123C is a 4 megabit Battery Backed SRAM


    OCR Scan     		EDI8F32123C 128Kx32 EDI8F32123C 128Kx 128Kx8 EDI8F32123C70MMC EDI8F32123C85MMC EDBF32123C PDF

    socket am3 pinout

    Abstract: socket AM2 pinout AM3 Processor Functional INTEL 80960 pipeline architecture 80960RM
    Text: Intel 80960RM I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Product Features ■ ■ ■ ■ High Performance Intel® 80960JT Core ■ —Sustained One Instruction/Clock Execution


    Original     		80960RM 80960JT 32-Bit socket am3 pinout socket AM2 pinout AM3 Processor Functional INTEL 80960 pipeline architecture PDF

    540L

    Abstract: No abstract text available
    Text: 80960RM I/O Processor • Complies with PCI Local Bus Specification, Revision 2.1 ■ 5 K PCI Signalling Environment Data Sheet Advance Information Product Features ■ High Performance 80960JT Core ■ — Sustained One Instruction/Clock Execution — 16 Kbyte, Two-Way Set-Associative


    OCR Scan     		80960RM 80960JT 32-Bit 1710H 540L PDF

    LGA 1155 Socket PIN diagram

    Abstract: LGA 1155 PIN diagram LGA 1155 pin out lga1155 pin diagram E3-1275 intel LGA 1155 PIN diagram 1155 PINmap lga1155 land E3-1260L CATERR Catastrophic Error
    Text: Intel Xeon® Processor E3-1200 Family Datasheet, Volume 1 This is Volume 1 of 2 June 2011 Document Number: 324970-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS


    Original     		E3-1200 aimQ21 LGA 1155 Socket PIN diagram LGA 1155 PIN diagram LGA 1155 pin out lga1155 pin diagram E3-1275 intel LGA 1155 PIN diagram 1155 PINmap lga1155 land E3-1260L CATERR Catastrophic Error PDF

    S29WS256N

    Abstract: S71WS512NE0BFWZZ
    Text: S71WS512NE0BFWZZ Stacked Multi-Chip Product MCP Flash Memory and pSRAM CMOS 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory and Pseudo-Static RAM ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION MCP Features The S71WS512 Series is a product line of stacked Multi-Chip


    Original     		S71WS512NE0BFWZZ S71WS512 S29WS256N 54MHz 128Mb 96-ball S71WS512NE0BFWZZ S29WS256N PDF

    MO-47AE

    Abstract: ADSP-21060L ADSP-21062L EDI8L32128V EDI8L32512V MPC860 TMS320LC31
    Text: EDI8L32512V White Electronic Designs 512Kx32 SRAM Module.3.3V FEATURES    ADSP-21060L SHARC  ADSP-21062L (SHARC)  Texas Instruments TMS320LC31   The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and


    Original     		EDI8L32512V 512Kx32 ADSP-21062L TMS320LC31 EDI8L32512V ADSP-21060L MPC860 MO-47AE ADSP-21060L ADSP-21062L EDI8L32128V MPC860 TMS320LC31 PDF

    100MHZ

    Abstract: 133MHZ WED3DL644V
    Text: White Electronic Designs WED3DL644V 4Mx64 SDRAM FEATURES DESCRIPTION The WED3DL644V is a 4Mx64 Synchronous DRAM configured as 4x1Mx64. The SDRAM BGA is constructed with four 4Mx16 SDRAM die mounted on a multi-layer laminate substrate and packaged in a 153 lead, 17mm by


    Original     		WED3DL644V 4Mx64 WED3DL644V 4x1Mx64. 4Mx16 133MHZ, 125MHZ 100MHZ. 100MHZ 133MHZ PDF

    cmo 765

    Abstract: GR-78 DDR200 DDR266A PC2100 10292003-DNYO-BD9L infineon ddr numbering
    Text: Data Sheet, Rev. 1.2, Jan. 2004 HYS72D16500GR-[7/8]-A HYS72D32501GR-[7/8]-A Low Profile DDR SDRAM-Modules DDR SDRAM Memory Products N e v e r s t o p t h i n k i n g . The information in this document is subject to change without notice. Edition 2004-06 Published by Infineon Technologies AG,


    Original     		HYS72D16500GR- HYS72D32501GR- 10292003-DNYO-BD9L cmo 765 GR-78 DDR200 DDR266A PC2100 10292003-DNYO-BD9L infineon ddr numbering PDF

    Untitled

    Abstract: No abstract text available
    Text: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM Preliminary* FEATURES DESCRIPTION n Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate


    Original     		WEDPY256K72V-XBX 256Kx72 WEDPY256K72V-XBX 256K72 100MHz 133MHz 150MHz 166MHz 200MHZ PDF

    EDI8L32512V-AC

    Abstract: EDI8L32128V EDI8L32512V MO-47AE MPC860 TMS320LC31 ADSP-21060L ADSP-21062L
    Text: White Electronic Designs EDI8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC


    Original     		EDI8L32512V 512Kx32 EDI8L32512V ADSP-21060L ADSP-21062L TMS320LC31 MPC860 512Kx8, EDI8L32512V-AC EDI8L32128V MO-47AE MPC860 TMS320LC31 ADSP-21060L ADSP-21062L PDF

    8l32128c

    Abstract: block diagram of of TMS320C4X EDI8L32512C20AI EDI8L32512C TMS320C30 TMS320C32 DSP96002 EDI8L24128C EDI8L32256C
    Text: EDI8L32512C 512K x 32 CMOS High Speed Static RAM FEATURES DESCRIPTION DSP Memory Solution • Motorola DSP96002 • Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x Random Access Memory Array • Fast Access Times: 12*, 15, 17, and 20ns • TTL Compatible Inputs and Outputs


    Original     		EDI8L32512C DSP96002 TMS320C3x, TMS320C4x M0-47AE EDI8L32512C 8l32128c block diagram of of TMS320C4X EDI8L32512C20AI TMS320C30 TMS320C32 DSP96002 EDI8L24128C EDI8L32256C PDF

    IBM041841RLAD7

    Abstract: IBM043641rLAD SA10 SA11 SA13 SA14 SA16 35 x 35 PBGA, 580 100 balls 4k sram
    Text: . Preliminary IBM041841RLAD IBM043641RLAD 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • CMOS Technology • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Single Differential PECL Clocks compatible with


    Original     		IBM041841RLAD IBM043641RLAD IBM041841RLAD7 IBM043641rLAD SA10 SA11 SA13 SA14 SA16 35 x 35 PBGA, 580 100 balls 4k sram PDF

    IBM043641WLAD-4

    Abstract: IBM043641WLAD IBM043641WLAD3P IBM043641WLAD3 IBM043641WLAD-3P IBM043641WLA SA10 SA11 SA13 SA16
    Text: . Preliminary IBM041841WLAD IBM043641WLAD 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • CMOS Technology • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Single Ended Pseudo-PECL Clock compatible with LVTTL Levels


    Original     		IBM041841WLAD IBM043641WLAD IBM043641WLAD-4 IBM043641WLAD IBM043641WLAD3P IBM043641WLAD3 IBM043641WLAD-3P IBM043641WLA SA10 SA11 SA13 SA16 PDF

    SA73A

    Abstract: No abstract text available
    Text: . Preliminary IBM043611RLAB IBM041811RLAB 32K X 36 & 64K X 18 SRAM Features • 32K x 36 or 64K x 18 Organizations • Registered Outputs • 0.5 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Pipeline Mode Of Operation with


    Original     		IBM043611RLAB IBM041811RLAB SA73A PDF

    EDI8L32512V-AC

    Abstract: 8L32512V
    Text: EDI8L32512V 512Kx32 SRAM MODULE, 3.3V FEATURES The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions. • DSP Memory Solution


    Original     		EDI8L32512V 512Kx32 ADSP-21060L ADSP-21062L TMS320LC31 MPC860 M0-47AE EDI8L32512V EDI8L32512V-AC 8L32512V PDF

    Untitled

    Abstract: No abstract text available
    Text: . Preliminary IBM04184BSLAD IBM04364BSLAD 256K x 18 & 128K x 36 SW SRAM Features • 256K x 18 & 128K x 36 Organizations nous Select and Data Ins • CMOS Technology • Registered Outputs • Synchronous Pipeline Mode Of Operation with Standard Write • Asynchronous Output Enable and Power Down


    Original     		IBM04184BSLAD IBM04364BSLAD IBM0418BSLAD IBM0436BSLAD PDF

    Untitled

    Abstract: No abstract text available
    Text: EDI8L32512C ^ E D I 512KX32 SRAM Module ELECTRONIC DESIGNS, INC 512Kx32 CMOS High Speed Static RAM Features DSP Memory Solution The EDI8L32512C is a highspeed, 5V, 16 megabit SRAM. The device is available with access times of 12,15,17 and 20ns allowing the creation of a no wait state DSP memory


    OCR Scan     		EDI8L32512C 512KX32 EDI8L32512C DSP96002 TMS320C3x, TMS320C4x TMS320C30/6C 128Kx32 8L32128C PDF