DORMAN Search Results

Z380

Contextual Info: USER 'S M ANUAL ZILOG USER’s MANUAL CHAPTER 7 RESET 7.1 INTRODUCTION The Z380 CPU is placed in a dormant state when the /RESET input is asserted. All its operations are terminated, including any interrupt, bus request, or bus transaction that may be in progress. On the Z380 MPU, the IOCLK

TMS320LC546A

Contextual Info: HEADER LINE 1 FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999 D Advanced Multibus Architecture With Three D D D D D D D D D D D D D D D D D D Separate 16-Bit Data Memory Buses and One Program Memory Bus 40-Bit Arithmetic Logic Unit ALU

TMS320LC206

Contextual Info: TMS320C206, TMS320LC206 DIGITAL SIGNAL PROCESSORS SPRS065B – JUNE 1998 – REVISED JANUARY 1999 D D D High-Performance Static CMOS Technology Includes the ’320C2xLP Core CPU TMS320C206, TMS320LC206 are Members of the ’C20x/’C2000 Platform Which Also

Contextual Info: TPS62100, TPS62101, TPS62102, TPS62103 MULTIMODE LOWĆPOWER BUCK CONVERTER ą SLUS446B – MAY 2000 – REVISED DECEMBER 2000 applications D 2.5-V to 9-V Input Range D 0.8-V to 8-V Output Range D Dual-Auto-Mode for High-Efficiency D D D D D at Light Loads

WJA58

Abstract: TMS320 TMS320C203 TMS320C209 TMS320C25 TMS320F206 C203 F206 SPRS050 WJ-A58
Contextual Info: TMS320F206 DIGITAL SIGNAL PROCESSOR SPRS050A - NOVEMBER 1996 - REVISED APRIL 1998 D High-Performance Static CMOS Technology D Includes the T320C2xLP Core CPU D TMS320F206 is a Member of the TMS320C20x Generation, Which Also Includes the TMS320C203, and TMS320C209 Devices

74FCT244

Abstract: ML65244 ML65244CK ML65244CS ML65L244 ML65L244CK
Contextual Info: August 1996 ML65244/ML65L244 High Speed Dual Quad Buffer/Line Drivers GENERAL DESCRIPTION FEATURES The ML65244 and ML65L244 are non-inverting dual quad buffer/line drivers. The high operating frequency 50MHz driving a 50pF load and low propagation delay

C12A

Abstract: HC05 M68HC05 MC68HC05C12A MC68HC05C9A MC68HC705C9A
Contextual Info: General Release Specification A G R E E M E N T MC68HC705C9A R E Q U I R E D HC705C9AGRS/D REV. 2.0 CSIC MCU Design Center East Kilbride, Scotland N O N - D I S C L O S U R E April 24, 1996 A G R E E M E N T R E Q U I R E D General Release Specification N O N - D I S C L O S U R E

TAG 8926

Abstract: Lpg 899 SDC 2921 TF 6221 HEN LED display 12V+RELAY+1+C/8 pin ic sdc 3733
Contextual Info: MCIMX31 and MCIMX31L Multimedia Applications Processors Reference Manual MCIMX31RM Rev. 1 2/2006 How to Reach Us: USA/Europe/Locations Not Listed: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-521-6274 or 480-768-2130

Contextual Info: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction

TMS320LC51

Contextual Info: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction

TIC126 equivalent

Abstract: BCR40 93C46 AM79C978A PC99 of finite state machine AM79C901A
Contextual Info: Am79C978A PCnet - Home Single-Chip 1/10 Mbps PCI Home Networking Controller DISTINCTIVE CHARACTERISTICS n Fully integrated 1 Mbps HomePNA Physical Layer PHY as defined by Home Phoneline Networking Alliance (HomePNA) specification 1.1 — Optimized for home networking applications

BIOS chip

Abstract: IEEE 1284 Peripheral Interface Controller stl micro sd connector FDC37C662 SMC34C60 QIC-80
Contextual Info: STANDARD MICROSYSTEMS CORPORATION S M C 34C 60 PRELIMINARY COMPONENT PRODUCTS DIVISION 80 Arkay Drive, Hauppauge, NY 11788 15161 « 5 6000 Fax 51Í1231-6004 Parallel Port Interface Chip - Peripheral Side FEATURES Creates PC/AT-Style Bus from Parallel Printer Port Signals

80286based

Abstract: JC EG
Contextual Info: a AMD 80C287 Advanced Micro Devices 80-Bit CMOS Math Coprocessor DISTINCTIVE CHARACTERISTICS • High-performance CMOS process yields 10-MHz and 12-MHz speed grades ■ Available In space-saving 44-pin PLCC as well as 40-pin DIP ■ BO-blt numeric accelerator for 80C28&- and

TMS320C5x architecture diagram

Contextual Info: TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 D D D D D D D D D D D D D D D Powerful 16-Bit TMS320C5x CPU 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation 25-, 40-, and 50-ns Single-Cycle Instruction

m8087 intel

Contextual Info: p R iy iM O B y w in te i M80C187 80-BIT NUMERIC PROCESSOR EXTENSION Military High Perform ance 80-Bit Internal Architecture Tw o to Three Tim es M8087 Perform ance at Equivalent Clock Speed Im plements A N S I/IE E E Standard 7541985 fo r Binary Floating-Point

coprocessor

Contextual Info: in y Intel387 SX MATH COPROCESSOR N e w A u to m a tic P o w e r M a n a g e m e n t — L o w P o w e r C o n su m p tio n — T y p ic a lly 100 m A in D y n a m ic M o de, an d 4 m A in Id le M o d e S o c k e t C o m p a tib le w ith In te l3 8 7 Fam ily

Contextual Info: ¡ p f ô n y iM * ? M80186 HIGH INTEGRATION 16-BIT MICROPROCESSOR Military • Direct Addressing Capability to 1 MByte of Memory a Completely Object Code Compatible ■ Integrated Feature Set — Enhanced M8086-2 CPU — Clock Generator — 2 Independent, High-Speed DMA

sab80188

Abstract: SAB 8086 80188 siemens EM 235 cn
Contextual Info: 47E » • SIEMENS B235b05 GG313b4 T « S I E G SIEMENS AKTIENGESELLSCHAF High-lntegration SAB 80188/80188-1 8-Bit Microprocessor Preliminary SAB 80188 8 MHz • Integrated feature set - enhanced SAB 8088-2 CPU - clock generator - 2 independent high-speed DMAchannels

Contextual Info: intJ 80C187 80-BIT MATH COPROCESSOR • High Performance 80-Bit Internal Architecture ■ Implements ANSI/IEEE Standard 7541985 for Binary Floating-Point Arithmetic ■ Upward Object-Code Compatible from 8087 ■ Fully Compatible with 387DX and 387SX Math Coprocessors. Implements all 387

hall marking code A04

Abstract: INTELDX4 write-through YSS 928
Contextual Info: INTEL486 PROCESSOR FAMILY • lntelDX4TM P ro c e s s o r — Up to 100-MHz Operation -Speed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant I/O Buffers

Contextual Info: i i r t r J Ä i M @ l O M IF C O M A Y O !* ] M80C186XL20,16,12,10 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR Low Power, Full Static Version of M80C186 Operation Modes: — Enhanced Mode — DRAM Refresh Control Unit — Power-Save Mode — Direct Interface to 80C187

PCD5070

Abstract: baseband GSM BTS PCD5071 GSM signal processing block bts gsm rx unit digital mobile radio GSM software defined radio msc in gsm msc mobile switching center PCF5081
Contextual Info: PHILIPS INTERNATIONAL t,7E D • 711DaEt, QOtiSSlt, TT4 ■ Philips Semiconductors RF Communication* Product» PHIN Preliminary specification GSM baseband processors for digital mobile cellular radio _ PCF5081/PCF5082 GSM Baseband Signal processors

manual intel d33025

Abstract: intel D33025 mother board manual PDF intel d33025 D33025 INTEL MOTHER BOARD motherboard canada ices 003 class b DDR n232 manual motherboard canada ices 003 class b D33025 motherboard canada ices 003 d33025 d33025* manual S5000VSA S5000VSASASR
Contextual Info: Intel Server Board S5000VSA Technical Product Specification Intel order number: D36978-008 Revision 1.6 June, 2009 Enterprise Platforms and Services Division - Marketing Intel® Server Board S5000VSA TPS Table of Contents Revision History Date April 2006

LGA 1366 Socket PIN diagram

Abstract: motherboard canada ices 003 d33025 LGA 1366 Socket diagram manual motherboard canada ices 003 class b D33025 manual motherboard canada ices 003 class b lga 1366 CATERR sgpio backplane IOH-36D fdc 9268
Contextual Info: Intel Server Board S5500BC Technical Product Specification Intel order number: E42249-003 Revision 1.0 January, 2009 Enterprise Platforms and Services Division - Marketing Intel® Server Board S5500BC TPS Table of Contents Revision History Date January 2009