DATA13 Search Results

BLM21P221

Abstract: BLM21P221SG NC7SZ08P5 16V 100uf ISP1161 BAU10 V5R12
Contextual Info: 1 2 B1 B2 B3 B4 B5 J1 3 DATA[0.15] B6 B7 B8 B9 B10 4 DATA[0.15] V+3.3 V+5 A A B DATA15 DATA13 DATA11 DATA9 DATA7 DATA5 DATA3 DATA1 NC NC NC NC NC NC NC NC NC NC NC ADDR25 ADDR25 C ADDR3 ADDR3 NC NC NC NC NC NC NC NC NC NC NC V+3.3 V+5 NC NC NC NC NC NC NC

RJ113BZ

Abstract: fb0805 WIZ830MJ w5300 120R-100MHZ 0.1uF RD 1V RJ113 OSC25I A3A1
Contextual Info: 5 4 3V3A 1V8A 3.3V 3 2 1 1V8D 1V8D 3.3V 3.3V 1V8A 3V3A FB2 66 /RESET BIT16EN 18 BIT16EN D 15 D 14 D 13 D 12 D 11 D 10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 28 29 30 31 32 33 34 35 38 39 40 41 42 43 44 45 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 DATA7

SMD code PJ7

Contextual Info: MC9S12C32 Easy Reference SCI Multiplexed Address/Data Bus DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 MSCAN SPI RXCAN TXCAN MISO MOSI SS SCK PP4/KWP4/PW4 PP5/KWP5/PW5 PP7/KWP7 VDDX VSSX PM0/RXCAN PM1/TXCAN

sn75185 equivalent

Contextual Info: SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335 – JANUARY 1999 D D D D D D D D D D D DB, DW, N, OR PW PACKAGE TOP VIEW Single-Chip TIA/EIA-232-F Interface for IBM PC/AT Serial Port Designed to Transmit and Receive 4-µs Pulses (Equivalent to 256 kbit/s)

Contextual Info: SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154A – MARCH 1993 – REVISED MAY 1995 D D D D D D D D D D D D D Meet or Exceed Standards EIA/TIA-422-B, RS-485, CCITT Recommendation V.11 Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments

ABT652A

Contextual Info: SN54ABT652A, SN74ABT652A OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS072F – JANUARY 1991 – REVISED MAY 1997 D D D CLKAB SAB OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC CLKBA SBA OEBA B1

Contextual Info: SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS339H – MARCH 1994 – REVISED OCTOBER 1998 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS148C – DECEMBER 1982 – REVISED JANUARY 1998 D D SN54HC574 . . . J OR W PACKAGE SN74HC574 . . . DW, N, OR PW PACKAGE TOP VIEW High-Current 3-State Noninverting Outputs

CD4069UB

Abstract: cmos hex inverter
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS054 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

TXC07900AIBG

Abstract: TXC-07900AIBG TSOP transmitter B020H OED155TM TXC-07900-MB VTXP-6 AU-AIS dk12b EK117
Contextual Info: OED155 Device Dual STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07900 PRODUCT PREVIEW DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED155, is a dual STM-1 SDH framer and overhead terminator, virtual tributary

Contextual Info: SN54LV367A, SN74LV367A HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS398C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54ALS541, SN74ALS540, SN74ALS541 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDAS025C – APRIL 1982 – REVISED JANUARY 1995 • • • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading Data Flow-Through Pinout All Inputs on

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCAS536B – SEPTEMBER 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

TLC320AD545EVM

Abstract: TLC320AD535
Contextual Info: TLC320A545C/I Single Channel Data/Fax Codec Data Manual 1999 Mixed Signal Products SLAS206B IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

Contextual Info: SN75179B DIFFERENTIAL DRIVER AND RECEIVER PAIR SLLS003E – OCTOBER 1985 – REVISED JUNE 1998 D D D D D D D D D D D OR P PACKAGE TOP VIEW Meets or Exceeds the Requirements of TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendation V.11 Bus Voltage Range . . . – 7 V to 12 V

Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54AC240, SN74AC240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS512C – JUNE 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

Contextual Info: SN54LV4051A, SN74LV4051A 8-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS428B – MAY 1999 – REVISED JUNE 2000 D D D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on

CD4066BE

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS051 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

SN54AC04

Contextual Info: SN54AC04, SN74AC04 HEX INVERTERS SCAS519C – JULY 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402C – APRIL 1998 – REVISED MAY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 250 mA Per

TSB41LV03

Contextual Info: TSB12LV01A / TSB12LV01AI Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller Sourced from: SLLS332A February 2000 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue

SLLA081

Abstract: paccom ev app abstract
Contextual Info: TSB12LV01BĆEP IEEE 1394Ć1995 HighĆSpeed SerialĆBus LinkĆLayer Controller Data Manual July 2002 Mixed Signal Products SGLS123 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

AM37xx

Abstract: SPRS616F bt.656 to MIPI digital cvbs encoder 640 480 RGB mipi bridge Cortex-A8 MIPI E2 nand flash 683 Transistor
Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture