D899 Search Results

b 754

Contextual Info: 8=11,1724 □OflSS'ìT 4 • T I I 4 ■ T E X A S I N S T R L I N / I N T F C " T - i s - y s - o s SN75154 QUADRUPLE LINE RECEIVER 4QE D D899, NOVEMBER 1970-REVISED MAY 1990 > Satisfies Requirements of EIA Standard RS-232-C D, J . OR N PACKAGE (TOP VIEW)

Contextual Info: MP, i 0 PRELIMINARY IND: -25 a PALLV22V1OZ-25 Advanced Micro Devices Low-Voltage, Zero-Power 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Zero-power CMOS technology — 15 jiA standby current

Contextual Info: COM’L: -25 IND: -25 a P A L C E 1 6 V 8 Z -2 5 Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic_ DISTINCTIVE CHARACTERISTICS Advanced Micro Devices • Outputs programmable as registered or combinatorial in any combination ■ Programmable output polarity

Contextual Info: FINAL COM’L: Q-10 c\ Advanced Micro Devices PALCE22V10Q-10 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • 10 ns propagation delay ■ 83 MHz fMAX external ■ Low-power EE CMOS ■ 10 macrocells programmable as registered or combinatorial, and active high or active low to

E10561

Abstract: DG31PR intel d101ggc board INTEL DG31pr D945GCCR intel d101ggc D865PERL D102GGC2 intel dg41rq D845EPI
Contextual Info: Work Play Support About Intel Products Change Location Technology Communities Downloads Reseller Support & Downloads Browse By Product Download Center Advanced Search Contact Support Desktop Boards I/O shields for Intel Desktop Boards Search Support & Downloads

mip 2h2

Abstract: Solid state CCIR ca 152 sh ei 33ca RGB565 to rgb888 PMB 8888 660-227 331 dim hee nv tag 8514 SERVICE MANUAL tv sharp A205D
Contextual Info: Advance This document contains information on a product under development. Information is not warranted and is subject to change. Bt2166 High-Performance PCI/AGP 3D Video/Graphics Controller Applications Feature Summary • • • • • • • Microsoft Windows 95 Direct3D accelerator

cj1m-cpu13

Abstract: CS1G-CPU43H USER Manual C1000H-CPU01-EV1 Omron Sysmac C200HG
Contextual Info: Cat. No. V096-E1-03 NP-series NP3-MQ000@ NP3-MQ001@ NP5-MQ000@ NP5-MQ001@ NP5-SQ000@ NP5-SQ001@ NP-NPDC0-V1 Programmable Terminal NP-Designer USER’S MANUAL NP-series NP3-MQ000@ NP3-MQ001@ NP5-MQ000@ NP5-MQ001@ NP5-SQ000@ NP5-SQ001@ NP-NPDC0-V1 Programmable Terminal

Contextual Info: COM’L: -15/20 il Advanced Micro Devices M A C H L V 2 1 0 - 1 5 /2 0 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • ■ 50 MHz max external Low-voltage operation, 3.3-V JEDEC compatible ■ 38 Inputs with advanced pull-up/pull-down

Contextual Info: COM’L: H-5 PALCE20V8H-5 EE CMOS 24-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function, and fuse-map compatible with all GAL 20V8/A ■ Programmable enable/disable control ■ Electrically erasable CMOS technology pro­

MACH110 cross reference

Abstract: PAL 002a MACH Technical Briefs Manual PAL 008a ACH110 amd 44 MACH210 class B
Contextual Info: a MACH Family Data Book High Density EE CMOS Programmable Logic Summer 1992 A d van ced Micro Devices M ACH™ 1 and M ACH 2 F a m ilie s High Density EE CMOS Programmable Logic Q3 1992 Data Book Final: Preliminary: M AC H 110-12/15/20 C om ’l, Mil M ASC 110-15/20 C om ’l

d6282

Abstract: DVP16SP dvp-16sp Module DVP-16SP plc extension port DVP 16sp manual D6283 dvp plc with modbus communication ladder diagram PLC Communication cables pin diagram delta plc delta PLC dvp28sv operation manual Delta 16sp module manual
Contextual Info: DVPDNET-SL DeviceNet Network Scanner Operation Manual DVP-0204520-02 DeviceNet Network Scanner DVPDNET-SL Warning Please read this instruction carefully before use and follow this instruction to operate the device in order to prevent damages on the device or injuries to staff.

Contextual Info: MRV 10 1393 COM’L: -7 a Advanced Micro Devices PALCE22V10H-7 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • 7.5 ns propagation delay ■ 100 MHz fm a x external ■ Low-power EE CMOS ■ 10 macrocells programmable as registered or

Contextual Info: MÄV i o 1993 IND: -30 Advanced Micro Devices PALLV16V8Z-30 Low-Voltage, Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible — Vcc = +3.0 V to +3.6 V ■ Zero-power CMOS technology

273505

Contextual Info: NRR ï 2 1993 COM’L: D/2 SI Advanced Micro Devices PAL16R8D/2 Series 10 ns 20-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 10 ns maximum propagation delay Power-up reset for initialization ■ Drop in replacement for PAL16R8D series with same specifications

c 3866 transistor

Contextual Info: 2SC4784 Silicon NPN Bipolar Transistor HITACHI Application VHF / UHF wide band amplifier Features • High gain bandwidth product fT= 10 GHz typ • High gain, low noise figure PG = 15.0 dB typ. NF = 1.2 dB typ at f = 900 MHz Outline CM PAK 2 2. Base 3. Collector

16L8-5

Abstract: PAL16R8
Contextual Info: ADV MICRO P L A / P L E / A R R A Y S 2ÔE D G25752fci GG311Gb b AMD2 CO M 'L: -5/4 T—46—19—13 Z f Advanced Micro Devices PAL16R8-5/4 Series 5 ns TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 5 ns and 4.5 ns m axim um pro p a g a tio n delay

Contextual Info: HD74ALVCH162543 16-bit Registered Transceivers with 3-state Outputs HITACHI ADE-205-183 Z Preliminary 1st. Edition December 1996 Description The HD74ALVCH162543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch enable (LEAB or LEBA) and output enable (OEAB or OEBA) inputs are provided for each register to

mip 291

Abstract: DIAGRAM pal 005a ic MIP 291 AM29116 X0953 29LS18 PAL16L8 LDPC encoder AM29xx PAL16R8 algorithm amd
Contextual Info: a Am29116 A Microcoded Instruction Processor Based On The Am29116 Application Note Bv Robert e . Anderson ADVANCED MICRO DEVICES The MIP Board: A Microcoded 1-Code Processor Based on the Am29116 A. David Milton, Mitel Robert E. Anderson, AMD March, 1985. Table Of Contents

E99A

Abstract: D79f ED89 E17A ST E954 d697 marking d1f3 111rr011 EE5555 D685 97
Contextual Info: Reference Manual A G R E E M E N T CPU12 N O N - D I S C L O S U R E HC12 R E Q U I R E D Order this document by CPU12RM/AD Rev. 1.0 R E Q U I R E D A G R E E M E N T N O N - D I S C L O S U R E Motorola reserves the right to make changes without further notice to

Contextual Info: 1 1111111111111 111111 1 1111111111111 1 1111111111111 1 1111111111111 1 1 A1234567898AAABCDCEFCAFB A AAA AAAAAAAAAAA AA AAAAA A AAAAAAAA A A CA3E AAA AA1EEAFBAFB3CBAAECACA6 AFE CD!A"E#A CCCA988$

transistor D756

Abstract: d756 D902 MS-013 SO20 TSP 200 d897 d905
Contextual Info: BUK9MRR-65PKK Dual TrenchPLUS FET Logic Level FET Rev. 02 — 17 June 2010 Product data sheet 1. Product profile 1.1 General description Dual N-channel enhancement mode field-effect power transistor in SO20. Device is manufactured using NXP High-Performance HPA TrenchPLUS technology, featuring

54ACT899

Abstract: 54ACT899DMQB 54ACT899FMQB 54ACT899LMQB D899
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/03/96 Last Update Date: 03/17/97 Last Major Revision Date: 07/03/96 MN54ACT899-X REV 1B0 9-Bit Latchable Transceiver with Parity Generator/Checker General Description The ACT899 is a 9-bit to 9-bit parity transceiver with transparent latches. The device

d880 y

Abstract: D895 D363 D669 d684 D882, D772 D806 D921 D667
Contextual Info: Ordering number : ENN7160 CMOS IC LC75848T 1/8 to 1/10 Duty General-Purpose LCD Display Drivers Overview Package Dimensions The LC75848T is 1/8 to 1/10 duty general-purpose LCD display drivers used for character and graphics display. These products operate under the control of a

PAL22V10

Contextual Info: COM’L PAL22V10-7 7.5 ns 24-Pin TTL Versatile PAL Device Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • ■ ■ ■ 7.5 ns propagation delay and 91 MHz fMAx 10 macrocells programmable as registered or combinatorial, and active high or active low to