D1U EEPROM Search Results

D1U eeprom

Abstract: D1U-H-2800-52-HB1DC hb1c hb2dc D1U-H-2800 2800-52-HB2C HB2-dc
Contextual Info: D1U Communication Protocol D1U-H-2800-52-HB1C Application Note Communication Protocol Support The D1U family of power supplies currently supports 3.3V-bus and 5V-bus standardmode 100kHz I2C Serial Communication as outlined in Philips Semiconductors ‘The

HA2C

Abstract: ascii protocols D1U-W-1600-12-HA2 D1U eeprom
Contextual Info: D1U Communication Protocol Application Note Communication Protocol Support The D1U family of power supplies currently supports 3.3V-bus and 5V-bus standardmode 100kHz and fast-mode (400kHz) I2C Serial Communication as outlined in Philips Semiconductors ‘The I2C Bus Specification Version 2.1’ (January 2000).

HA2C

Contextual Info: D1U4 Communication Protocol Application Note Communication Protocol Support The D1U family of power supplies currently supports 3.3V-bus and 5V-bus standardmode 100kHz and fast-mode (400kHz) I2C Serial Communication as outlined in Philips Semiconductors ‘The I2C Bus Specification Version 2.1’ (January 2000).

D1U eeprom

Abstract: b1a12
Contextual Info: Product Specifications PART NO: REV: AM375S2850E-GA/GH/GL 1.5 General Information 1GB 128Mx72 SDRAM PC100/PC133 REGISTERED 168 PIN DIMM Description: The AM375S2850E is a 128M X 72 Synchronous Dynamic RAM high density memory module. This memory module consists of 18 CMOS stacked 128Mx4 bit stacked from 64Mx4bit with 4 banks Synchronous DRAMs in TSOP-II 400 mil packages and a 2K EEPROM in 8-pin TSSOP package. This module is a

Contextual Info: Product Specifications PART NO: REV: AM375S2850E-GA/GH/GL 1.5 General Information 1GB 128Mx72 SDRAM PC100/PC133 REGISTERED 168 PIN DIMM Description: The AM375S2850E is a 128M X 72 Synchronous Dynamic RAM high density memory module. This memory module consists of 18 CMOS stacked 128Mx4 bit stacked from 64Mx4bit with 4 banks Synchronous DRAMs in TSOP-II 400 mil packages and a 2K EEPROM in 8-pin TSSOP package. This module is a

D1U eeprom

Abstract: KMM390S6428T-GA KMM390S6428T PC133 registered reference design
Contextual Info: KMM390S6428T Preliminary PC133 SDRAM MODULE Revision History Revision 0 Feb. 1999 • PC133 first published REV. 0 Feb. 1999 Preliminary PC133 SDRAM MODULE KMM390S6428T KMM390S6428T SDRAM DIMM (RCC 0.8ver. Base) 64Mx72 SDRAM DIMM with PLL & Register based on Stacked 64Mx4, 4Banks, 4K Ref., 3.3V SDRAMs with SPD

KMM390S2858AT1-GA

Abstract: d14l PC133 registered reference design
Contextual Info: KMM390S2858AT1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions

PC133 registered reference design

Contextual Info: M390S2858BT1 PC133 Registered DIMM Revision History Revision 0.0 May. 2000 • PC133 first published REV. 0 May. 2000 M390S2858BT1 PC133 Registered DIMM M390S2858BT1 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD

Contextual Info: PC100 Registered DIMM M377S2858AT3 M377S2858AT3 SDRAM DIMM Intel 1.2 ver Base 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M377S2858AT3 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M377S2858AT3 consists of eighteen CMOS Stacked

PC133 registered reference design

Contextual Info: Shrink-TSOP KMM390S6520BN Preliminary PC133 Registered DIMM Revision History Revision 0.0 July 29. 1999, Preliminary - First generation of datasheet. REV. 0.0 July. 1999 Shrink-TSOP KMM390S6520BN Preliminary PC133 Registered DIMM KMM390S6520BN SDRAM DIMM

DIN 7340

Abstract: B1a12 M390S5658MT1 M390S5658MT1-C75 PC133 registered reference design 256Mx4
Contextual Info: Preliminary PC133 Registered DIMM M390S5658MT1 M390S5658MT1 SDRAM DIMM 256Mx72 SDRAM DIMM with PLL & Register based on Stacked 256Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S5658MT1 is a 256M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S5658MT1 consists of eighteen CMOS Stacked

D12U

Contextual Info: M377S6428MT1 PC100 Registered DIMM Revision History Revision 0.1 April 29, 2000 - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice." Rev. 0.1 Apr. 2000 M377S6428MT1 PC100 Registered DIMM M377S6428MT1 SDRAM DIMM (Intel 1.0 ver. Base)

M377S5658MT3

Abstract: M377S5658MT3-C1H M377S5658MT3-C1L 256Mx4
Contextual Info: Preliminary PC100 Registered DIMM M377S5658MT3 M377S5658MT3 SDRAM DIMM Intel 1.2 ver Base 256Mx72 SDRAM DIMM with PLL & Register based on Stacked 256Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M377S5658MT3 is a 256M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M377S5658MT3 consists of eighteen CMOS Stacked

PC133 registered reference design

Contextual Info: KMM390S2858AT1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions

b1a12

Abstract: KMM390S2858AT-GA PC133 registered reference design
Contextual Info: KMM390S2858AT Preliminary PC133 SDRAM MODULE Revision History Revision 0 Feb. 1999 • PC133 first published REV. 0 Feb. 1999 Preliminary PC133 SDRAM MODULE KMM390S2858AT KMM390S2858AT SDRAM DIMM (RCC 0.8 ver. Base) 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD

MA2180

Contextual Info: SDRAM MODULE KMM377S2858AT2 KMM377S2858AT2 SDRAM DIMM Intel 1.1 ver. Base 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S2858AT2 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The

Contextual Info: KMM377S6428T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Rev. 0.1 May. 1999 KMM377S6428T3 PC100 Registered DIMM KMM377S6428T3 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on Stacked 64Mx4, 4Banks, 4K Ref., 3.3V SDRAMs with SPD

Contextual Info: SDRAM MODULE KMM377S2858AT3 KMM377S2858AT3 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S2858AT3 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The

CDC2510A

Abstract: KMM375S3227BT-G0 KMM375S3227BT-G8 KMM375S3227BT-GH KMM375S3227BT-GL d11u D16U
Contextual Info: Preliminary KMM375S3227BT SDRAM MODULE KMM375S3227BT SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on Stacked 32Mx4, 4Banks 4K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM375S3227BT is a 32M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung KMM375S3227BT consists of eighteen CMOS Stacked

M377S6428AT3-C1H

Abstract: M377S6428AT3-C1L
Contextual Info: M377S6428AT3 PC100 Registered DIMM Revision History Revision 0.1 April 29, 2000 - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice." Rev. 0.1 Apr. 2000 M377S6428AT3 PC100 Registered DIMM M377S6428AT3 SDRAM DIMM (Intel 1.2 ver Base)

KMM377S6428T3-GH

Abstract: KMM377S6428T3-GL
Contextual Info: KMM377S6428T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Revision 0.2 (April 29, 2000) - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice."

PC133 registered reference design

Contextual Info: M390S2858AT1 PC133 Registered DIMM Revision History Revision 0.0 Sep. 1999 • PC133 first published • Revision 0.1 (Apr. 2000) • Added the description of "Staktek’s stacking technology is Samsung’s stacking technology of choice" REV. 0.1 Apr. 2000

PC133 registered reference design

Contextual Info: M390S2858AT1 PC133 Registered DIMM Revision History Revision 0.0 Sep. 1999 • PC133 first published REV. 0.0 Sep. 1999 M390S2858AT1 PC133 Registered DIMM M390S2858AT1 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD

M377S6428MT2-C1H

Abstract: M377S6428MT2-C1L
Contextual Info: M377S6428MT2 PC100 Registered DIMM Revision History Revision 0.1 April 29, 2000 - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice." Rev. 0.1 Apr. 2000 M377S6428MT2 PC100 Registered DIMM M377S6428MT2 SDRAM DIMM (Intel 1.1 ver. Base)