D000000 Search Results

PBT GF15 connector

Abstract: M4629022
Contextual Info: 17 18 16 15 14 13 12 9 SYMBOL DEFINITION 10 11 8 A DIMENSION WITHOUT AN INSPECTION REPORT SYMBOL r a DOES NOT REQUIRE INSPECTION. IT MAY BE CONTROLLED ON THE INDIVIDUAL COMPONENT DRAWING. H 20.3 r00000&#39;000| 00 000000! — <sa L 0<d000000 j 00=000000 eJ/i NO MISSING SYMBOL

XF-TRB40013ANL-CER

Contextual Info: 1. Mechanical: LEU LM X multiple XF-TRB40013ANL-CER DATE CODE • m u DDDDDDDDDDDDDDDDDDD LBJJ oo 05 i-H CM* —0. 77 D D D D D D D D D D000000000 D D D D D D D D rJ yyuuuyyyyyyyyyy — 0. 46 —1 L i . 27 -28. 58- J 1. 27—1I— -24. 13SUGGESTED PAD LAYOUT

.7J6

Abstract: 6AI10
Contextual Info: 8 1. MECHANICAL DIMENSIONS : o OJ 00 CO 01 o cK OJ I 01 I 12,70 [0,500] lnI i< 89 [0,350] in o B DD000D00 o LDJLOJLO JLOJL o OJ o KXmultiple 0> XD H S1618C C1 YYWW \0 VJD UUüÜuuu D000000. 0,46 [0,018] 0,64 [0,025] 1,27 [0,050] 1,27 [0,050] SUGGESTED PAD LAYDUT

16X2

Contextual Info: d000000 16X2, Mux 4, Drive 3, Non-Pipelined High-Speed Single-Port Synchronous SRAM Features Memory Description • Precise Optimization for Infineon’s C9DD1 0.20µm The 16X2 SRAM is a high-performance, synchronous single-port, 16-word by 2-bit memory designed to

30900

Contextual Info: • Bar Graph A rrays Electrical/O ptical Data M aterial Em itted C olor P a rt No. S ha p e P eak W ave Length (nrn) Typ. 10 segm ents Figure No. Iv (ucd) lf=10mA Vf (V) lf=10mA M ax. Min. Typ. 2200 9000 30900 8500 G U R X10D G aA sP /G aP (Red) 627 1.9

Contextual Info: IDT79R3710 IDT79R3740 ADVANCE INFORMATION LASER PRINTER INTEGRATED SYSTEM CONTROLLER FEATURES • Pin-Compatible System Controller with Laser Printerspecific features for the IDT R30xx family of processors • DRAM Controller - 1 - 40 MB directly, 1 - 3 banks directly

CR32A

Abstract: 00FF 302F CR16A MP 6101 CR32F
Contextual Info: ASSEMBLER.book : cover+ i Sat Mar 1 09:38:26 1997 CompactRISC Assembler Reference Manual Part Number: 424521426-003 February 1997 ASSEMBLER.book : cover+ ii Sat Mar 1 09:38:26 1997 REVISION RECORD VERSION RELEASE DATE SUMMARY OF CHANGES 0.6 August 1995 First beta release.

athermal awg

Abstract: Arrayed Waveguide Grating AWG, 100 GHz, Wideband ROADM neophotonics
Contextual Info: www.neophotonics.com VER2.0 / 070501 Athermal Wideband AWG MUX/DMUX Features • Athermal design operates over outdoor temperature range • 100 GHz channel spacing now available • Can match existing channel plans • Semiconductor style mass production

VOCODERS voip

Abstract: Malleable Technologies
Contextual Info: PM73140/ PM73141 MECA-4A / MECA-4I PRELIMINARY DATA SHEET PMC-2001253 ISSUE 1 VOICE OVER PACKET PROCESSOR PM73140/ PM73141 MECA-4A/ MECA-4I VOICE OVER PACKET PROCESSOR DATA SHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 1: AUGUST 2000 PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL

Contextual Info: External Memory Interface Handbook Volume 5 Section I. ALTMEMPHY Design Tutorials External Memory Interface Handbook Volume 5 Section I. ALTMEMPHY Design Tutorials 101 Innovation Drive San Jose, CA 95134 www.altera.com EMI_TUT_DDR-3.0 Document last updated for Altera Complete Design Suite version:

Contextual Info: Base Station Antennas PerforMax TM ANTENNA SPECIFICATIONS ANTENNA TYPE: D100-0003-0061 Description: Varitilt 824-960 MHz, dual polarized, 65 degree azimuth beamwidth, 12.3 dBd gain panel antenna with 1-10 degrees of variable electrical downtilt Electrical Specifications

EM 1000 kwh meter

Abstract: 3721 st make 3 phase reactive power meters circuits kwh meter circuit diagram 3phase XDSP 9.830 mhz Hall Current Sensors nDSP
Contextual Info: STPMC1 Programmable poly-phase energy calculator IC Features • Supports 1-, 2- or 3-phase WYE and Delta services, from 2 to 4 wires ■ Computes cumulative active and reactive wideband and fundamental harmonic energies ■ Computes active and reactive energies, RMS

tricore instruction set

Abstract: TriCore Architecture Manual IEEE-754 V13-1 tricore pcp instruction set
Contextual Info: User’s Manual, V1.3.8, January 2008 TriCore 1 32-bit Unified Processor Core Volume 1 Core Architecture V1.3 & V1.3.1 Architecture Microcontrollers Edition 2008-01 Published by Infineon Technologies AG 81726 Munich, Germany 2008 Infineon Technologies AG

EVK1100 sdram

Abstract: EVK1100 EVK1104 AT32UC3A0512 AVR32102 AT32UC3A0512 usart avr32-gcc AVR32 MT48LC16M16A2TG-7E UC3A3256
Contextual Info: AVR32733: Placing data and the heap in external SDRAM. Features • Place the heap in external SDRAM • Place variables in external SDRAM • SDRAMC Software Framework driver usage • GNU linker script overview and IAR linker command file overview • Startup customization APIs of the AVR32 GNU Toolchain and IAR EWAVR32

CR32A

Abstract: T00000014 00FF 302F CR16A CR16B T00000012
Contextual Info: CompactRISC ΤΜ Assembler Reference Manual Part Number: 424521772-003 January 1998 REVISION RECORD VERSION RELEASE DATE SUMMARY OF CHANGES 0.6 August 1995 First beta release. 0.7 January 1997 Minor changes and corrections. 1.0 August 1996 CR16A Product Version.

Contextual Info: Base Station Antennas PerforMax TM ANTENNA SPECIFICATIONS ANTENNA TYPE: D100-0049-0061 Description: Varitilt 870-960 MHz, single polarized, 90 degree azimuth beamwidth, 13 dBd gain panel antenna with 1-10 degrees of variable electrical downtilt Electrical Specifications

Contextual Info: AD9741/3/5/6/7 Evaluation Board Quick Start Guide One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Getting Started with the AD9741/3/5/6/7 Evaluation Board WHAT’S IN THE BOX

h3ba omron timer

Abstract: omron h3ba timer H3BA timer wiring diagram TRIAC TAG 9105 omron MA415a
Contextual Info: Cat. No. Z901-E1-05 SYSMAC NE1S Series NE1S-CPU01 Programmable Controller OPERATION MANUAL NE1S Series NE1S-CPU01 Programmable Controller Operation Manual Revised December 2006 iv Notice: OMRON products are manufactured for use according to proper procedures by a qualified operator

ic 7808 voltage regulator function

Abstract: V16-1 REGULATOR IC 7808 transponder key F420
Contextual Info: Tem ic S e m i c o n d u c t o r s IDIC Demo Kit 3 U2270B Base-Station Board 3 / R/W - Demo Software IDS V1.61 Getting Started • R ead this dem o board u se r’s m anual • Place a transponder close to the base-station antenna • C o n n ect a cen tro n ics cable to the U 2270B dem o b oard

MT41J64M16LA-187E

Abstract: MT41J64M16LA MT8HTF12864HDY-800G1 design of dma controller using vhdl sodimm ddr3 connector PCB footprint DDR3 DIMM footprint ddr3 Designs guide micron ddr3 MT47H32M16CC-3 temperature controller using microcontroller
Contextual Info: Section I. ALTMEMPHY Design Tutorials 101 Innovation Drive San Jose, CA 95134 www.altera.com EMI_TUT_DDR-2.0 Document Version: Document Date: 2.0 July 2010 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

8250 uart rxd

Abstract: SW TO MTS 102 A2
Contextual Info: TMS320C6671 Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Literature Number: SPRS756

Contextual Info: TMS320C6674 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.

d5200c

Abstract: RAMB16BWER vhdl code SECDED Xilinx ISE Design Suite 14.2 XC6SLX45T RAMB18E1
Contextual Info: LogiCORE IP AXI Block RAM BRAM Controller (v1.03a) DS777 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP AXI Block RAM (BRAM) Controller is a soft IP core for use with the Xilinx Vivado™ Design Suite, Embedded Development Kit

528000-2FFFF

Abstract: TSOP 48 sa247
Contextual Info: ADVANCED INFORMATION MX29LA129M H/L 128M-BIT SINGLE VOLTAGE 3V ONLY UNIFORM SECTOR FLASH MEMORY FEATURES GENERAL FEATURES • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations • Configuration - 16,777,216 x 8 / 8,388,608 x 16 switchable