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    CY7C1339 Price and Stock

    Rochester Electronics LLC CY7C1339-166AC

    IC SRAM 4MBIT PARALLEL 100TQFP
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    DigiKey CY7C1339-166AC Bulk 39
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    Rochester Electronics LLC CY7C1339A-83AC

    IC SRAM 4MBIT PAR 83MHZ 100TQFP
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    DigiKey CY7C1339A-83AC Bulk 89
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    Rochester Electronics LLC CY7C1339A-66AC

    IC SRAM 4MBIT PARALLEL 100TQFP
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    DigiKey CY7C1339A-66AC Bulk 89
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    Rochester Electronics LLC CY7C1339F-166AC

    IC SRAM 4MBIT PARALLEL 100TQFP
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    DigiKey CY7C1339F-166AC Bulk 67
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    • 100 $4.54
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    Infineon Technologies AG CY7C1339G-133AXE

    IC SRAM 4MBIT PARALLEL 100TQFP
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    DigiKey CY7C1339G-133AXE Tray
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    CY7C1339 Datasheets (84)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1339 Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Original PDF
    CY7C1339-100AC Cypress Semiconductor Cache Memory Original PDF
    CY7C1339-100AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Original PDF
    CY7C1339-100AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Scan PDF
    CY7C1339-117AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Original PDF
    CY7C1339-133AC Cypress Semiconductor Cache Memory Original PDF
    CY7C1339-133AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Original PDF
    CY7C1339-133AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Scan PDF
    CY7C1339-133AI Cypress Semiconductor Cache Memory Original PDF
    CY7C1339-133AI Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Scan PDF
    CY7C1339-166AC Cypress Semiconductor Cache Memory Original PDF
    CY7C1339-166AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Original PDF
    CY7C1339-166AC Cypress Semiconductor 128K x 32 Synchronous-Pipelined Cache RAM Scan PDF
    CY7C1339A Cypress Semiconductor Fast access times: 4.8, 5, 6, and 7ns Original PDF
    CY7C1339A-100AC Cypress Semiconductor Fast access times: 4.8, 5, 6, and 7ns Original PDF
    CY7C1339A-66AC Cypress Semiconductor Fast access times: 4.8, 5, 6, and 7ns Original PDF
    CY7C1339B Cypress Semiconductor 128K x 32 Synchronous Pipelined Cache RAM Original PDF
    CY7C1339B-133AC Cypress Semiconductor 128K x 32 Synchronous Pipelined Cache RAM Original PDF
    CY7C1339B-166AC Cypress Semiconductor 128K x 32 Synchronous Pipelined Cache RAM Original PDF
    CY7C1339B-166BGC Cypress Semiconductor 128K x 32 Synchronous Pipelined Cache RAM Original PDF

    CY7C1339 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C1339

    Abstract: No abstract text available
    Text: fax id: 1109 PRELIMINARY CY7C1339 128K x 32 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 mW standby power (f=0, L version) The CY7C1339 is a 3.3V 128K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary


    Original     		PDF CY7C1339 CY7C1339 100-MHz 166-MHz

    CY7C1339G

    Abstract: No abstract text available
    Text: CY7C1339G 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128K x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are


    Original     		PDF CY7C1339G CY7C1339G

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G PRELIMINARY 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1339G 250-MHz 200-MHz 166-MHz 133-MHz 100-pin 119-ball CY7C133istory CY7C1339G

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G PRELIMINARY 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1339G 250-MHz 200-MHz 166-MHz 133-MHz 100-pin 119-ball CY7C133

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1339G 250-MHz 200-MHz 166-MHz 133-MHz 100-pin 119-ball

    CY7C1339F

    Abstract: CY7C1339F-225AC CY7C1339F-225BGC CY7C1339F-250AC CY7C1339F-250AI CY7C1339F-250BGC CY7C1339F-250BGI
    Text: CY7C1339F 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1339F 250-MHz 225-MHz 200-MHz CY7C1339F -133AI CY7C1339F-225AC CY7C1339F-225BGC CY7C1339F-250AC CY7C1339F-250AI CY7C1339F-250BGC CY7C1339F-250BGI

    CY7C1339G-133AXI data sheet

    Abstract: CY7C1339G
    Text: CY7C1339G PRELIMINARY 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1339G 250-MHz 200-MHz 166-MHz CY7C1339G CY7C1339G-133AXI data sheet

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter


    Original     		PDF CY7C1339G CY7C1339G

    CY7C1339

    Abstract: No abstract text available
    Text: CY7C1339 128K x 32 Synchronous-Pipelined Cache RAM Features • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states • Fully registered inputs and outputs for pipelined operation • 128K by 32 common I/O architecture • 3.3V core power supply


    Original     		PDF CY7C1339 100-MHz 166-MHz 133-MHz CY7C1339

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter


    Original     		PDF CY7C1339G CY7C1339G

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description[1] • Registered inputs and outputs for pipelined operation ■ 128 K × 32 common I/O architecture ■ 3.3 V core power supply (VDD)


    Original     		PDF CY7C1339G CY7C1339G

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339F PRELIMINARY 128K x 32 Pipelined Sync SRAM Features • Fully registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times — 2.6 ns for 250-MHz device


    Original     		PDF CY7C1339F 250-MHz 225-MHz 200-MHz 166-MHz 133-MHz 100-MHz 100-pin 119-ball CY7C1339F

    CY7C1339B

    Abstract: No abstract text available
    Text: CY7C1339B 128K x 32 Synchronous Pipelined Cache RAM Features The CY7C1339B I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V-tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states


    Original     		PDF CY7C1339B CY7C1339B 100-MHz 166-MHz 166-MHz

    CY7C1339B

    Abstract: No abstract text available
    Text: CY7C1339B 128K x 32 Synchronous Pipelined Cache RAM Features The CY7C1339B I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V-tolerant when VDDQ = 2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states


    Original     		PDF CY7C1339B CY7C1339B 100-MHz 166-MHz BG119)

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter


    Original     		PDF CY7C1339G CY7C1339G

    CY7C1339B-100AC

    Abstract: CY7C1339B cy7c1339b-133ai
    Text: 329 CY7C1339B 128K x 32 Synchronous-Pipelined Cache RAM Features • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states • Fully registered inputs and outputs for pipelined operation • 128K by 32 common I/O architecture


    Original     		PDF CY7C1339B 100-MHz 166-MHz 133-MHz CY7C1339B CY7C1339B-100AC cy7c1339b-133ai

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339G PRELIMINARY 4-Mbit 128K x 32 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times


    Original     		PDF CY7C1339G 250-MHz 200-MHz 166-MHz CY7C1339G

    cy7c1339g-133axi

    Abstract: c1339g
    Text: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter


    Original     		PDF CY7C1339G CY7C1339G cy7c1339g-133axi c1339g

    CY7C1339

    Abstract: No abstract text available
    Text: 329 CY7C1339 128K x 32 Synchronous-Pipelined Cache RAM Features • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states • Fully registered inputs and outputs for pipelined operation • 128K by 32 common I/O architecture • 3.3V core power supply


    Original     		PDF CY7C1339 100-MHz 166-MHz 133-MHz CY7C1339

    CY7C1339B100AI

    Abstract: CY7C1339B
    Text: CY7C1339B 128K x 32 Synchronous-Pipelined Cache RAM Features • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states • Fully registered inputs and outputs for pipelined operation • 128K by 32 common I/O architecture • 3.3V core power supply


    Original     		PDF CY7C1339B 100-MHz 166-MHz 133-MHz CY7C1339B CY7C1339B100AI

    CY7C1339B

    Abstract: No abstract text available
    Text: PRELIMINARY CY7C1339B 128K x 32 Synchronous-Pipelined Cache RAM Features • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states • Fully registered inputs and outputs for pipelined operation • 128K by 32 common I/O architecture


    Original     		PDF CY7C1339B 100-MHz 166-MHz 133-MHz CY7C1339B

    Untitled

    Abstract: No abstract text available
    Text: CY7C1339F PRELIMINARY 128K x 32 Pipelined Sync SRAM Features • Fully registered inputs and outputs for pipelined operation • 128K x 32 common I/O architecture • 3.3V core power supply • 2.5V / 3.3V I/O operation • Fast clock-to-output times — 2.6 ns for 250-MHz device


    Original     		PDF CY7C1339F 250-MHz 225-MHz 200-MHz 166-MHz 133-MHz 100-MHz 100-pin 119-ights.

    m3351

    Abstract: KD 2114 marking code J2UT 1203 6d t201 CY7C1339 EQUIVALENT cd 1031 cs
    Text: CY7C1339 128K x 32 Synchronous-Pipelined Cache RAM Features The CY7C1339 I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V tolerant when V DDq=2.5V. * Supports 100-MHz bus fo r Pentium and PowerPC operations w ith zero w ait states


    OCR Scan     		PDF CY7C1339 100-MHz 166-MHz 133-MHz CY7C1339 m3351 KD 2114 marking code J2UT 1203 6d t201 EQUIVALENT cd 1031 cs

    2N7805

    Abstract: gw 340 diode t03 package transistor pin configuration 32N03 DTG2400 DTG-2400 2N2144A 2N1100 2N126 2n228 transistor
    Text: CY7C1339 128K x 32 Synchronous-Pipelined Cache RAM Features The CY7C1339 I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V tolerant when V DDq=2.5V. * Supports 100-MHz bus fo r Pentium and PowerPC operations w ith zero w ait states


    OCR Scan     		PDF CY7C1339 100-MHz 166-MHz 133-MHz CY7C1339 Y220a/ T0220AA T0220AB TMW515TDB 2N7805 gw 340 diode t03 package transistor pin configuration 32N03 DTG2400 DTG-2400 2N2144A 2N1100 2N126 2n228 transistor