CY7C109B Search Results

Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-05038 Spec Title: CY7C109B, CY7C1009B 128K X 8 STATIC RAM Sunset Owner: Prashanth Jnanendra PRAS Replaced by: NONE CY7C109B CY7C1009B 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109B/CY7C1009B is a high-performance CMOS

Contextual Info: CY7C109D CY7C1009D 1-Mbit 128 K x 8 Static RAM 1-Mbit (128 K × 8) Static RAM Features • Pin- and function-compatible with CY7C109B/CY7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

Contextual Info: CY7C109B CY7C1009B 128K x 8 Static RAM Features put Enable OE , and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O 0 through I/O 7) is then

Contextual Info: CY7C109D CY7C1009D 1-Mbit 128K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C109B/CY7C1009B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power The CY7C109D/CY7C1009D is a high-performance CMOS

cy7c109b-15vc

Abstract: CY7C109B-15VI 109b1 cypress semiconductor cy7c109b-20zi
Contextual Info: 1CY7C1009B CY7C109B CY7C1009B 128K x 8 Static RAM Features • High speed — tAA = 12 ns • Low active power — 495 mW max. 12 ns • Low CMOS standby power — 55 mW (max.) 4 mW • 2.0V Data Retention • Automatic power-down when deselected • TTL-compatible inputs and outputs

CY7C1009D

Abstract: CY7C109D TSOP 66 thermal resistance
Contextual Info: CY7C109D CY7C1009D 1-Mbit 128 K x 8 Static RAM Features Functional Description [1] • Pin- and function-compatible with CY7C109B/CY7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

cy7c109bnl

Abstract: CY7C109BNL-15VC CY7C1009BN CY7C109BN
Contextual Info: CY7C109BN CY7C1009BN 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109BN/CY7C1009BN is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable (CE2), an active LOW

CY7C1009D-10VXI

Abstract: CY7C109D-10VXI a5 gnd
Contextual Info: CY7C109D CY7C1009D 1-Mbit 128K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C109B/CY7C1009B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power The CY7C109D/CY7C1009D is a high-performance CMOS

CY7C1009B

Abstract: CY7C109B
Contextual Info: CY7C109B CY7C1009B 128K x 8 Static RAM Features put Enable OE , and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O 0 through I/O 7) is then

CY7C1009BN

Abstract: CY7C109BN
Contextual Info: CY7C109BN CY7C1009BN 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109BN/CY7C1009BN is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable (CE2), an active LOW

CY7C109b-20zc

Abstract: CY7C1009B CY7C109B CY7C109B-15VXC CY7C1009B15VXC
Contextual Info: CY7C109B CY7C1009B 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109B/CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable (CE2), an active LOW

Contextual Info: CY7C109D CY7C1009D 1-Mbit 128 K x 8 Static RAM 1-Mbit (128 K × 8) Static RAM Features • Pin- and function-compatible with CY7C109B/CY7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

CY7C1009B

Abstract: CY7C109B
Contextual Info: 009B CY7C109B CY7C1009B 128K x 8 Static RAM Features • High speed — tAA = 12 ns • Low active power — 495 mW max. 12 ns • Low CMOS standby power — 55 mW (max.) 4 mW • 2.0V Data Retention • Automatic power-down when deselected • TTL-compatible inputs and outputs

CY7C109B

Abstract: CY7C1009B CY7C109b-20zc
Contextual Info: CY7C109B CY7C1009B 128K x 8 Static RAM Features CE1 , an active HIGH Chip Enable (CE2), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2)

CY7C109B-15VXC

Abstract: CY7C1009B CY7C109B CY7C109b-20zc CY7C1009B-15VXC
Contextual Info: CY7C109B CY7C1009B 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109B/CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable (CE2), an active LOW

CY7C1009D

Abstract: CY7C1009D-10VXI CY7C109D
Contextual Info: CY7C109D CY7C1009D 1-Mbit 128K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C109B/CY7C1009B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power The CY7C109D/CY7C1009D is a high-performance CMOS

Contextual Info: CY7C109D CY7C1009D 1-Mbit 128 K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C109B/CY7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

Contextual Info: CY7C109D CY7C1009D 1-Mbit 128K x 8 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C109B/CY7C1009B • High speed — tAA = 10 ns • Low active power — ICC = 60 mA @ 10 ns • Low CMOS standby power • • • •

CY7C1009BN

Abstract: CY7C109BN
Contextual Info: CY7C109BN, CY7C1009BN 128K x 8 Static RAM Features Functional Description The CY7C109BN/CY7C1009BN[1] is a high performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE1 , an active HIGH Chip Enable (CE2), an active LOW Output Enable

1H08S

Abstract: PI6C2405A-1HW ASM706CUA SOIC-6 microchip ADM809RAR ADM705AN MAX809SEUR T ASM5P2309-1H-16-S K7N163601B MAX810JEUR
Contextual Info: Supervisors Cross Reference Guide Alliance Maxim/Dallas IMP ASM1232LP DS1232LPS-2 IMP1232LP ASM1232LPCMA DS1232LP IMP1232LPCMA ASM1232LPEMA DS1232LP IMP1232LPEMA ASM1232LPN DS1232LP IMP1232LPN Analog Devices Micrel Microchip MIC1232N TC1232CPA - - - - - -

vhdl code for dice game

Abstract: Video Proc 3.3V 0.07A 64-Pin PQFP ez811 GRAPHICAL LCD interfaced with psoc 5 cypress ez-usb AN2131QC CYM9239 vhdl code PN 250 code generator CY3649 cy7c63723 Keyboard and Optical mouse program CY7C9689 ethernet
Contextual Info: Product Selector Guide Communications Products Description Pins Part Number Freq. Range Mbps ICC (mA) Packages* 3.3V SONET/SDH PMD Transceiver 2.5V SiGe Low Power SONET/SDH Transceiver SONET/SDH Transceiver w/ 100K Logic 2.5 G-Link w/ 100K Logic OC-48 Packet Over SONET (POS) Framer

ADM809RAR

Abstract: AS7C256A hsbga 416 lcd cross reference IDT CYPRESS CROSS REFERENCE clocks DS1232* watch dog timer Product Selector Guide mbg* sot143 FS781 IDT74SSTV16857
Contextual Info: DISCLAIMER Alliance Semiconductor Corporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Alliance Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied

K6X0808C1D-BF55

Abstract: HY6264P AS6C1008-55SIN samsung p28 K6R4016V1D-UC10 as6c4008-55sin HYNIX IS61LV25616AL-10KLI GS71116AGP-10 uPD431000ACZ-70L
Contextual Info: cross_reference Density Organization Alliance Alliance Part Number Alliance Package Alliance Speed Samsung Samsung Part Number Cypress Cypress Part Number Cypress Package Cypress Package Code Cypress Speed IDT Part Number IDT Package IDT Package Code IDT Speed ISSI

5962-8959821MMA

Abstract: 5962-8959835MZA 5962-8959838MZA 10 35L b3 5962-8959819M7A 5962-8959838M7A smd code a13 5962-8959837M7A 5962-8959820MUA 5962-8959821MTA
Contextual Info: SRAM MT5C1008 128K x 8 SRAM PIN ASSIGNMENT Top View WITH DUAL CHIP ENABLE 32-Pin DIP (C, CW) 32-Pin CSOJ (SOJ) AVAILABLE AS MILITARY SPECIFICATIONS NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ1 DQ2 DQ3 VSS •SMD 5962-89598 •MIL-STD-883 FEATURES • • •