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    CG624 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CG624 DAISY CHAIN SIX Microsemi Accessories, Programmers, Development Systems, DAISY CHAIN PKG MECH 624-CCGA Original PDF

    CG624 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    HiRel a54sx72a unused

    Abstract: No abstract text available
    Text: Advanced v1.3 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10


    Original     		RT54SX-S RT54SX-S TM1019 HiRel a54sx72a unused PDF

    LGA 478 SOCKET PIN LAYOUT

    Abstract: RTAX2000
    Text: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 LGA 478 SOCKET PIN LAYOUT RTAX2000 PDF

    rt54sx32su

    Abstract: RTSX72 RTSX32SU RTSX72-S
    Text: Advanced v0.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		TM1019 rt54sx32su RTSX72 RTSX32SU RTSX72-S PDF

    Untitled

    Abstract: No abstract text available
    Text: Advanced v0.3  RTAX-S Family FPGAs Sp e ci a l F ea t ur es f o r Sp a ce • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day • Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with


    Original     		32-Bits 114specifications PDF

    Untitled

    Abstract: No abstract text available
    Text: v5.0 ProASICPLUS TM Flash Family FPGAs Features and Benefits • High Capacity High Performance Routing Hierarchy Commercial and Industrial • • • • • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os


    Original     		PDF

    RAM256X9SST

    Abstract: ProASICPLUS Flash Family FPGAs v5.0
    Text: v5.0 ProASICPLUS TM Flash Family FPGAs Features and Benefits • High Capacity High Performance Routing Hierarchy Commercial and Industrial • • • • • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os


    Original     		APA075, APA150, APA300 RAM256X9SST ProASICPLUS Flash Family FPGAs v5.0 PDF

    Untitled

    Abstract: No abstract text available
    Text: v2 . 1 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		TM1019 PDF

    RTAX2000

    Abstract: schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S
    Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		TM1019 com/documents/CQ352FPGA RTAX2000 schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S PDF

    RTAX2000

    Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
    Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		TM1019 RTAX2000 footprint cqfp 280 RTAX1000S actel cqfp 84 PDF

    APA075

    Abstract: No abstract text available
    Text: v4.1 ProASICPLUS TM Flash Family FPGAs Features and Benefits High Capacity Commercial and Industrial • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os Military and Mil-Std 883B • • • 300, 000 to 1 million System Gates


    Original     		APA075, APA150, APA300 APA075 PDF

    M2GL005

    Abstract: A2F060
    Text: Power Matters. CO LUT4 C OVFL LO UB ADD_S FPGA and SoC Product +/- Catalog ] A[17:0 D EN RO IN YP EN _SR CLK RST EN X ] C[43:0 SL D SN[43 D ] B[17:0 17 SHIFT >> 17 ASC SEL_C SECURITY RELIABILITY LOW POWER :0] SN-1[43 I N T E G R AT I O N FPGAs SoC FPGAs


    Original     		MS2-002-14 M2GL005 A2F060 PDF

    56 pin edac connector

    Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
    Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		TM1019 56 pin edac connector PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical PDF

    1kx8 static ram

    Abstract: No abstract text available
    Text: v5.1 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os


    Original     		32-Bit APA075, APA150, APA300 1kx8 static ram PDF

    RTSX32su

    Abstract: Actel a54sx72a tid Silicon Sculptor II
    Text: v2.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		TM1019 RTSX32su Actel a54sx72a tid Silicon Sculptor II PDF

    RTAX2000

    Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
    Text: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 RTAX2000 rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3 PDF

    OB25LPLL

    Abstract: diagram LG 21 fs 4 bg model circuits MIL-STD-8831 RAM256X9AA APA075
    Text: v5.5 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os


    Original     		32-Bit APA075, APA150, APA300 OB25LPLL diagram LG 21 fs 4 bg model circuits MIL-STD-8831 RAM256X9AA APA075 PDF

    RTSX32su

    Abstract: RTSX32SU CQ84 RTSX72SU
    Text: v2.0 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		TM1019 RTSX32su RTSX32SU CQ84 RTSX72SU PDF

    CG624

    Abstract: SK-AX1-AX2-KITTOP AX1000-CG624 RTAX2000 RTAX1000SL-CG624 CCGA AX2000-CG624 FG484 SK-AX2-CG624-KITBTM RTAX2000S
    Text: Application Note AC275 CCGA to FBGA Adapter Sockets Introduction Actel recently introduced RTAX-S/L, the next generation designed-for-space antifuse Field Programmable Gate Arrays FPGAs . RTAX-S/L, with up to four million system gates, is Actel's highest density family,


    Original     		AC275 CG624 SK-AX1-AX2-KITTOP AX1000-CG624 RTAX2000 RTAX1000SL-CG624 CCGA AX2000-CG624 FG484 SK-AX2-CG624-KITBTM RTAX2000S PDF

    Untitled

    Abstract: No abstract text available
    Text: v2 .1  Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original     		700Mb/s 295kbits PDF

    Untitled

    Abstract: No abstract text available
    Text: v2.6 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original     		PDF

    A54SX72* radiation

    Abstract: cg624 A54SX72A actel 1020 datasheet RT54SX72S RT54SX-S TM1019 HiRel a54sx72a unused
    Text: Advanced v1.4 RT54SX-S RadTolerant FPGAs for Space Applications S p ec i a l F e a tu r es fo r S p ac e • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10


    Original     		RT54SX-S TM1019 A54SX72* radiation cg624 A54SX72A actel 1020 datasheet RT54SX72S RT54SX-S HiRel a54sx72a unused PDF

    Actel APA075

    Abstract: No abstract text available
    Text: v5.9 ProASICPLUS® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 K to 198 Kbits of Two-Port SRAM 66 to 712 User I/Os


    Original     		32-Bit Actel APA075 PDF

    APA600-PQ208M

    Abstract: FBGA-484 datasheet APA075 APA1000 APA150 APA300 APA450 APA750 APA150-TQ100 RPE 113
    Text: v5.8 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os


    Original     		PDF

    RTAX1000SL

    Abstract: RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector
    Text: RTAX-S/SL RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment 3.3 V LVTTL Clamp Diode Hot Insertion / Cold Sparing 1 Yes 5V Tolerance Input Buffer Output Buffer No 1 Yes Enabled/Disabled Enabled/Disabled 3.3 V PCI


    Original     		JESD8-11) RTAX1000SL RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector PDF